2 FreeRTOS V6.0.1 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 ***************************************************************************
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8 * + New to FreeRTOS, *
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9 * + Wanting to learn FreeRTOS or multitasking in general quickly *
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10 * + Looking for basic training, *
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11 * + Wanting to improve your FreeRTOS skills and productivity *
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13 * then take a look at the FreeRTOS eBook *
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15 * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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16 * http://www.FreeRTOS.org/Documentation *
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18 * A pdf reference manual is also available. Both are usually delivered *
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19 * to your inbox within 20 minutes to two hours when purchased between 8am *
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20 * and 8pm GMT (although please allow up to 24 hours in case of *
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21 * exceptional circumstances). Thank you for your support! *
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23 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 ***NOTE*** The exception to the GPL is included to allow you to distribute
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31 a combined work that includes FreeRTOS without being obliged to provide the
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32 source code for proprietary components outside of the FreeRTOS kernel.
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33 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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34 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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35 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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54 /*-----------------------------------------------------------
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55 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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56 *----------------------------------------------------------*/
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59 /* Standard includes. */
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62 /* Scheduler includes. */
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63 #include "FreeRTOS.h"
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66 /* Constants required to setup the initial stack. */
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67 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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68 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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69 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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71 /* Constants required to setup the PIT. */
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72 #define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )
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73 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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75 /* Constants required to handle critical sections. */
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76 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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79 #define portINT_LEVEL_SENSITIVE 0
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80 #define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )
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81 #define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )
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82 /*-----------------------------------------------------------*/
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84 /* Setup the PIT to generate the tick interrupts. */
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85 static void prvSetupTimerInterrupt( void );
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87 /* ulCriticalNesting will get set to zero when the first task starts. It
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88 cannot be initialised to 0 as this will cause interrupts to be enabled
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89 during the kernel initialisation process. */
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90 unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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92 /*-----------------------------------------------------------*/
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95 * Initialise the stack of a task to look exactly as if a call to
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96 * portSAVE_CONTEXT had been called.
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98 * See header file for description.
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100 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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102 portSTACK_TYPE *pxOriginalTOS;
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104 pxOriginalTOS = pxTopOfStack;
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106 /* Setup the initial stack of the task. The stack is set exactly as
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107 expected by the portRESTORE_CONTEXT() macro. */
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109 /* First on the stack is the return address - which in this case is the
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110 start of the task. The offset is added to make the return address appear
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111 as it would within an IRQ ISR. */
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112 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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115 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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117 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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119 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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121 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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123 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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125 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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127 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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129 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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131 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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133 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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135 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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137 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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139 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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141 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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144 /* When the task starts is will expect to find the function parameter in
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146 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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149 /* The status register is set for system mode, with interrupts enabled. */
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150 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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152 if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
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154 /* We want the task to start in thumb mode. */
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155 *pxTopOfStack |= portTHUMB_MODE_BIT;
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160 /* Interrupt flags cannot always be stored on the stack and will
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161 instead be stored in a variable, which is then saved as part of the
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163 *pxTopOfStack = portNO_CRITICAL_NESTING;
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165 return pxTopOfStack;
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167 /*-----------------------------------------------------------*/
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169 portBASE_TYPE xPortStartScheduler( void )
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171 extern void vPortStartFirstTask( void );
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173 /* Start the timer that generates the tick ISR. Interrupts are disabled
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175 prvSetupTimerInterrupt();
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177 /* Start the first task. */
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178 vPortStartFirstTask();
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180 /* Should not get here! */
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183 /*-----------------------------------------------------------*/
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185 void vPortEndScheduler( void )
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187 /* It is unlikely that the ARM port will require this function as there
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188 is nothing to return to. */
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190 /*-----------------------------------------------------------*/
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192 #if configUSE_PREEMPTION == 0
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194 /* The cooperative scheduler requires a normal IRQ service routine to
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195 simply increment the system tick. */
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196 static __arm __irq void vPortNonPreemptiveTick( void );
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197 static __arm __irq void vPortNonPreemptiveTick( void )
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199 unsigned long ulDummy;
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201 /* Increment the tick count - which may wake some tasks but as the
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202 preemptive scheduler is not being used any woken task is not given
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203 processor time no matter what its priority. */
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204 vTaskIncrementTick();
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206 /* Clear the PIT interrupt. */
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207 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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209 /* End the interrupt in the AIC. */
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210 AT91C_BASE_AIC->AIC_EOICR = ulDummy;
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215 /* Currently the IAR port requires the preemptive tick function to be
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216 defined in an asm file. */
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220 /*-----------------------------------------------------------*/
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222 static void prvSetupTimerInterrupt( void )
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224 AT91PS_PITC pxPIT = AT91C_BASE_PITC;
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226 /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
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227 on whether the preemptive or cooperative scheduler is being used. */
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228 #if configUSE_PREEMPTION == 0
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230 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortNonPreemptiveTick );
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234 extern void ( vPortPreemptiveTick )( void );
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235 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick );
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239 /* Configure the PIT period. */
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240 pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
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242 /* Enable the interrupt. Global interrupts are disables at this point so
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244 AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
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246 /*-----------------------------------------------------------*/
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248 void vPortEnterCritical( void )
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250 /* Disable interrupts first! */
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251 __disable_interrupt();
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253 /* Now interrupts are disabled ulCriticalNesting can be accessed
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254 directly. Increment ulCriticalNesting to keep a count of how many times
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255 portENTER_CRITICAL() has been called. */
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256 ulCriticalNesting++;
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258 /*-----------------------------------------------------------*/
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260 void vPortExitCritical( void )
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262 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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264 /* Decrement the nesting count as we are leaving a critical section. */
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265 ulCriticalNesting--;
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267 /* If the nesting level has reached zero then interrupts should be
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269 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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271 __enable_interrupt();
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275 /*-----------------------------------------------------------*/
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