2 FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
\r
4 This file is part of the FreeRTOS distribution.
\r
6 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
7 the terms of the GNU General Public License (version 2) as published by the
\r
8 Free Software Foundation and modified by the FreeRTOS exception.
\r
9 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
10 combined work that includes FreeRTOS without being obliged to provide the
\r
11 source code for proprietary components outside of the FreeRTOS kernel.
\r
12 Alternative commercial license and support terms are also available upon
\r
13 request. See the licensing section of http://www.FreeRTOS.org for full
\r
16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
\r
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
21 You should have received a copy of the GNU General Public License along
\r
22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
\r
23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
26 ***************************************************************************
\r
28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
\r
29 * See http://www.FreeRTOS.org/Documentation for details *
\r
31 ***************************************************************************
\r
35 Please ensure to read the configuration and relevant port sections of the
\r
36 online documentation.
\r
38 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
41 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
44 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
45 licensing and training services.
\r
48 /*-----------------------------------------------------------
\r
49 * Implementation of functions defined in portable.h for the Philips ARM7 port.
\r
50 *----------------------------------------------------------*/
\r
55 + Bug fix - The prescale value for the timer setup is now written to T0PR
\r
56 instead of T0PC. This bug would have had no effect unless a prescale
\r
57 value was actually used.
\r
60 /* Standard includes. */
\r
62 #include <intrinsics.h>
\r
64 /* Scheduler includes. */
\r
65 #include "FreeRTOS.h"
\r
68 /* Constants required to setup the tick ISR. */
\r
69 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
\r
70 #define portPRESCALE_VALUE 0x00
\r
71 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
\r
72 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
\r
74 /* Constants required to setup the initial stack. */
\r
75 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
\r
76 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
\r
78 /* Constants required to setup the PIT. */
\r
79 #define portPIT_CLOCK_DIVISOR ( ( unsigned portLONG ) 16 )
\r
80 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
\r
82 /* Constants required to handle interrupts. */
\r
83 #define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )
\r
84 #define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
\r
86 /* Constants required to handle critical sections. */
\r
87 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
\r
90 #define portINT_LEVEL_SENSITIVE 0
\r
91 #define portPIT_ENABLE ( ( unsigned portSHORT ) 0x1 << 24 )
\r
92 #define portPIT_INT_ENABLE ( ( unsigned portSHORT ) 0x1 << 25 )
\r
94 /* Constants required to setup the VIC for the tick ISR. */
\r
95 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
\r
96 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
\r
97 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
\r
99 /*-----------------------------------------------------------*/
\r
101 /* Setup the PIT to generate the tick interrupts. */
\r
102 static void prvSetupTimerInterrupt( void );
\r
104 /* ulCriticalNesting will get set to zero when the first task starts. It
\r
105 cannot be initialised to 0 as this will cause interrupts to be enabled
\r
106 during the kernel initialisation process. */
\r
107 unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
\r
109 /*-----------------------------------------------------------*/
\r
112 * Initialise the stack of a task to look exactly as if a call to
\r
113 * portSAVE_CONTEXT had been called.
\r
115 * See header file for description.
\r
117 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
119 portSTACK_TYPE *pxOriginalTOS;
\r
121 pxOriginalTOS = pxTopOfStack;
\r
123 /* Setup the initial stack of the task. The stack is set exactly as
\r
124 expected by the portRESTORE_CONTEXT() macro. */
\r
126 /* First on the stack is the return address - which in this case is the
\r
127 start of the task. The offset is added to make the return address appear
\r
128 as it would within an IRQ ISR. */
\r
129 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
\r
132 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
\r
134 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
\r
136 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
\r
138 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
\r
140 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
\r
142 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
\r
144 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
\r
146 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
\r
148 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
\r
150 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
\r
152 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
\r
154 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
\r
156 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
\r
158 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
\r
161 /* When the task starts is will expect to find the function parameter in
\r
163 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
166 /* The status register is set for system mode, with interrupts enabled. */
\r
167 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
\r
170 /* Interrupt flags cannot always be stored on the stack and will
\r
171 instead be stored in a variable, which is then saved as part of the
\r
173 *pxTopOfStack = portNO_CRITICAL_NESTING;
\r
175 return pxTopOfStack;
\r
177 /*-----------------------------------------------------------*/
\r
179 portBASE_TYPE xPortStartScheduler( void )
\r
181 extern void vPortStartFirstTask( void );
\r
183 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
185 prvSetupTimerInterrupt();
\r
187 /* Start the first task. */
\r
188 vPortStartFirstTask();
\r
190 /* Should not get here! */
\r
193 /*-----------------------------------------------------------*/
\r
195 void vPortEndScheduler( void )
\r
197 /* It is unlikely that the ARM port will require this function as there
\r
198 is nothing to return to. */
\r
200 /*-----------------------------------------------------------*/
\r
202 #if configUSE_PREEMPTION == 0
\r
204 /* The cooperative scheduler requires a normal IRQ service routine to
\r
205 simply increment the system tick. */
\r
206 static __arm __irq void vPortNonPreemptiveTick( void );
\r
207 static __arm __irq void vPortNonPreemptiveTick( void )
\r
209 /* Increment the tick count - which may wake some tasks but as the
\r
210 preemptive scheduler is not being used any woken task is not given
\r
211 processor time no matter what its priority. */
\r
212 vTaskIncrementTick();
\r
214 /* Ready for the next interrupt. */
\r
215 T0IR = portTIMER_MATCH_ISR_BIT;
\r
216 VICVectAddr = portCLEAR_VIC_INTERRUPT;
\r
221 /* This function is called from an asm wrapper, so does not require the __irq
\r
223 void vPortPreemptiveTick( void );
\r
224 void vPortPreemptiveTick( void )
\r
226 /* Increment the tick counter. */
\r
227 vTaskIncrementTick();
\r
229 /* The new tick value might unblock a task. Ensure the highest task that
\r
230 is ready to execute is the task that will execute when the tick ISR
\r
232 vTaskSwitchContext();
\r
234 /* Ready for the next interrupt. */
\r
235 T0IR = portTIMER_MATCH_ISR_BIT;
\r
236 VICVectAddr = portCLEAR_VIC_INTERRUPT;
\r
241 /*-----------------------------------------------------------*/
\r
243 static void prvSetupTimerInterrupt( void )
\r
245 unsigned portLONG ulCompareMatch;
\r
247 /* A 1ms tick does not require the use of the timer prescale. This is
\r
248 defaulted to zero but can be used if necessary. */
\r
249 T0PR = portPRESCALE_VALUE;
\r
251 /* Calculate the match value required for our wanted tick rate. */
\r
252 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
\r
254 /* Protect against divide by zero. Using an if() statement still results
\r
255 in a warning - hence the #if. */
\r
256 #if portPRESCALE_VALUE != 0
\r
258 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
\r
262 T0MR0 = ulCompareMatch;
\r
264 /* Generate tick with timer 0 compare match. */
\r
265 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
\r
267 /* Setup the VIC for the timer. */
\r
268 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
\r
269 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
\r
271 /* The ISR installed depends on whether the preemptive or cooperative
\r
272 scheduler is being used. */
\r
273 #if configUSE_PREEMPTION == 1
\r
275 extern void ( vPortPreemptiveTickEntry )( void );
\r
277 VICVectAddr0 = ( unsigned portLONG ) vPortPreemptiveTickEntry;
\r
281 extern void ( vNonPreemptiveTick )( void );
\r
283 VICVectAddr0 = ( portLONG ) vPortNonPreemptiveTick;
\r
287 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
\r
289 /* Start the timer - interrupts are disabled when this function is called
\r
290 so it is okay to do this here. */
\r
291 T0TCR = portENABLE_TIMER;
\r
293 /*-----------------------------------------------------------*/
\r
295 void vPortEnterCritical( void )
\r
297 /* Disable interrupts first! */
\r
298 __disable_interrupt();
\r
300 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
301 directly. Increment ulCriticalNesting to keep a count of how many times
\r
302 portENTER_CRITICAL() has been called. */
\r
303 ulCriticalNesting++;
\r
305 /*-----------------------------------------------------------*/
\r
307 void vPortExitCritical( void )
\r
309 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
\r
311 /* Decrement the nesting count as we are leaving a critical section. */
\r
312 ulCriticalNesting--;
\r
314 /* If the nesting level has reached zero then interrupts should be
\r
316 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
318 __enable_interrupt();
\r
322 /*-----------------------------------------------------------*/
\r