2 FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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54 /*-----------------------------------------------------------
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55 * Implementation of functions defined in portable.h for the ST STR71x ARM7
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57 *----------------------------------------------------------*/
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59 /* Library includes. */
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63 /* Standard includes. */
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66 /* Scheduler includes. */
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67 #include "FreeRTOS.h"
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70 /* Constants required to setup the initial stack. */
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71 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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72 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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73 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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75 /* Constants required to handle critical sections. */
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76 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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78 #define portMICROS_PER_SECOND 1000000
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80 /*-----------------------------------------------------------*/
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82 /* Setup the watchdog to generate the tick interrupts. */
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83 static void prvSetupTimerInterrupt( void );
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85 /* ulCriticalNesting will get set to zero when the first task starts. It
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86 cannot be initialised to 0 as this will cause interrupts to be enabled
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87 during the kernel initialisation process. */
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88 unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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90 /* Tick interrupt routines for cooperative and preemptive operation
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91 respectively. The preemptive version is not defined as __irq as it is called
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92 from an asm wrapper function. */
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93 __arm __irq void vPortNonPreemptiveTick( void );
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94 void vPortPreemptiveTick( void );
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96 /*-----------------------------------------------------------*/
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99 * Initialise the stack of a task to look exactly as if a call to
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100 * portSAVE_CONTEXT had been called.
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102 * See header file for description.
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104 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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106 portSTACK_TYPE *pxOriginalTOS;
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108 pxOriginalTOS = pxTopOfStack;
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110 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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111 is not really required. */
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114 /* Setup the initial stack of the task. The stack is set exactly as
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115 expected by the portRESTORE_CONTEXT() macro. */
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117 /* First on the stack is the return address - which in this case is the
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118 start of the task. The offset is added to make the return address appear
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119 as it would within an IRQ ISR. */
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120 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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123 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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125 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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127 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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129 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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131 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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133 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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135 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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137 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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139 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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141 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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143 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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145 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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147 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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152 /* When the task starts is will expect to find the function parameter in
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154 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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157 /* The status register is set for system mode, with interrupts enabled. */
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158 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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160 if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
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162 /* We want the task to start in thumb mode. */
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163 *pxTopOfStack |= portTHUMB_MODE_BIT;
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168 /* Interrupt flags cannot always be stored on the stack and will
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169 instead be stored in a variable, which is then saved as part of the
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171 *pxTopOfStack = portNO_CRITICAL_NESTING;
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173 return pxTopOfStack;
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175 /*-----------------------------------------------------------*/
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177 portBASE_TYPE xPortStartScheduler( void )
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179 extern void vPortStartFirstTask( void );
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181 /* Start the timer that generates the tick ISR. Interrupts are disabled
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183 prvSetupTimerInterrupt();
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185 /* Start the first task. */
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186 vPortStartFirstTask();
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188 /* Should not get here! */
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191 /*-----------------------------------------------------------*/
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193 void vPortEndScheduler( void )
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195 /* It is unlikely that the ARM port will require this function as there
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196 is nothing to return to. */
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198 /*-----------------------------------------------------------*/
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200 /* The cooperative scheduler requires a normal IRQ service routine to
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201 simply increment the system tick. */
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202 __arm __irq void vPortNonPreemptiveTick( void )
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204 /* Increment the tick count - which may wake some tasks but as the
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205 preemptive scheduler is not being used any woken task is not given
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206 processor time no matter what its priority. */
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207 vTaskIncrementTick();
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209 /* Clear the interrupt in the watchdog and EIC. */
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213 /*-----------------------------------------------------------*/
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215 /* This function is called from an asm wrapper, so does not require the __irq
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217 void vPortPreemptiveTick( void )
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219 /* Increment the tick counter. */
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220 vTaskIncrementTick();
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222 /* The new tick value might unblock a task. Ensure the highest task that
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223 is ready to execute is the task that will execute when the tick ISR
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225 vTaskSwitchContext();
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227 /* Clear the interrupt in the watchdog and EIC. */
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231 /*-----------------------------------------------------------*/
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233 static void prvSetupTimerInterrupt( void )
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235 /* Set the watchdog up to generate a periodic tick. */
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236 WDG_ECITConfig( DISABLE );
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237 WDG_CntOnOffConfig( DISABLE );
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238 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
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240 /* Setup the tick interrupt in the EIC. */
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241 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
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242 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
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243 EIC_IRQConfig( ENABLE );
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244 WDG_ECITConfig( ENABLE );
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246 /* Start the timer - interrupts are actually disabled at this point so
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247 it is safe to do this here. */
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248 WDG_CntOnOffConfig( ENABLE );
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250 /*-----------------------------------------------------------*/
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252 __arm __interwork void vPortEnterCritical( void )
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254 /* Disable interrupts first! */
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255 __disable_interrupt();
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257 /* Now interrupts are disabled ulCriticalNesting can be accessed
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258 directly. Increment ulCriticalNesting to keep a count of how many times
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259 portENTER_CRITICAL() has been called. */
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260 ulCriticalNesting++;
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262 /*-----------------------------------------------------------*/
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264 __arm __interwork void vPortExitCritical( void )
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266 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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268 /* Decrement the nesting count as we are leaving a critical section. */
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269 ulCriticalNesting--;
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271 /* If the nesting level has reached zero then interrupts should be
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273 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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275 __enable_interrupt();
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279 /*-----------------------------------------------------------*/
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