2 FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
\r
4 This file is part of the FreeRTOS distribution.
\r
6 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
7 the terms of the GNU General Public License (version 2) as published by the
\r
8 Free Software Foundation and modified by the FreeRTOS exception.
\r
9 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
10 combined work that includes FreeRTOS without being obliged to provide the
\r
11 source code for proprietary components outside of the FreeRTOS kernel.
\r
12 Alternative commercial license and support terms are also available upon
\r
13 request. See the licensing section of http://www.FreeRTOS.org for full
\r
16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
\r
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
21 You should have received a copy of the GNU General Public License along
\r
22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
\r
23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
26 ***************************************************************************
\r
28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
\r
29 * See http://www.FreeRTOS.org/Documentation for details *
\r
31 ***************************************************************************
\r
35 Please ensure to read the configuration and relevant port sections of the
\r
36 online documentation.
\r
38 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
41 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
44 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
45 licensing and training services.
\r
48 /*-----------------------------------------------------------
\r
49 * Implementation of functions defined in portable.h for the ST STR71x ARM7
\r
51 *----------------------------------------------------------*/
\r
53 /* Library includes. */
\r
57 /* Standard includes. */
\r
60 /* Scheduler includes. */
\r
61 #include "FreeRTOS.h"
\r
64 /* Constants required to setup the initial stack. */
\r
65 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
\r
66 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
\r
68 /* Constants required to handle critical sections. */
\r
69 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
\r
71 #define portMICROS_PER_SECOND 1000000
\r
73 /*-----------------------------------------------------------*/
\r
75 /* Setup the watchdog to generate the tick interrupts. */
\r
76 static void prvSetupTimerInterrupt( void );
\r
78 /* ulCriticalNesting will get set to zero when the first task starts. It
\r
79 cannot be initialised to 0 as this will cause interrupts to be enabled
\r
80 during the kernel initialisation process. */
\r
81 unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
\r
83 /* Tick interrupt routines for cooperative and preemptive operation
\r
84 respectively. The preemptive version is not defined as __irq as it is called
\r
85 from an asm wrapper function. */
\r
86 __arm __irq void vPortNonPreemptiveTick( void );
\r
87 void vPortPreemptiveTick( void );
\r
89 /*-----------------------------------------------------------*/
\r
92 * Initialise the stack of a task to look exactly as if a call to
\r
93 * portSAVE_CONTEXT had been called.
\r
95 * See header file for description.
\r
97 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
99 portSTACK_TYPE *pxOriginalTOS;
\r
101 pxOriginalTOS = pxTopOfStack;
\r
103 /* Setup the initial stack of the task. The stack is set exactly as
\r
104 expected by the portRESTORE_CONTEXT() macro. */
\r
106 /* First on the stack is the return address - which in this case is the
\r
107 start of the task. The offset is added to make the return address appear
\r
108 as it would within an IRQ ISR. */
\r
109 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
\r
112 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
\r
114 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
\r
116 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
\r
118 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
\r
120 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
\r
122 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
\r
124 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
\r
126 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
\r
128 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
\r
130 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
\r
132 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
\r
134 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
\r
136 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
\r
138 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
\r
141 /* When the task starts is will expect to find the function parameter in
\r
143 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
146 /* The status register is set for system mode, with interrupts enabled. */
\r
147 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
\r
150 /* Interrupt flags cannot always be stored on the stack and will
\r
151 instead be stored in a variable, which is then saved as part of the
\r
153 *pxTopOfStack = portNO_CRITICAL_NESTING;
\r
155 return pxTopOfStack;
\r
157 /*-----------------------------------------------------------*/
\r
159 portBASE_TYPE xPortStartScheduler( void )
\r
161 extern void vPortStartFirstTask( void );
\r
163 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
165 prvSetupTimerInterrupt();
\r
167 /* Start the first task. */
\r
168 vPortStartFirstTask();
\r
170 /* Should not get here! */
\r
173 /*-----------------------------------------------------------*/
\r
175 void vPortEndScheduler( void )
\r
177 /* It is unlikely that the ARM port will require this function as there
\r
178 is nothing to return to. */
\r
180 /*-----------------------------------------------------------*/
\r
182 /* The cooperative scheduler requires a normal IRQ service routine to
\r
183 simply increment the system tick. */
\r
184 __arm __irq void vPortNonPreemptiveTick( void )
\r
186 /* Increment the tick count - which may wake some tasks but as the
\r
187 preemptive scheduler is not being used any woken task is not given
\r
188 processor time no matter what its priority. */
\r
189 vTaskIncrementTick();
\r
191 /* Clear the interrupt in the watchdog and EIC. */
\r
195 /*-----------------------------------------------------------*/
\r
197 /* This function is called from an asm wrapper, so does not require the __irq
\r
199 void vPortPreemptiveTick( void )
\r
201 /* Increment the tick counter. */
\r
202 vTaskIncrementTick();
\r
204 /* The new tick value might unblock a task. Ensure the highest task that
\r
205 is ready to execute is the task that will execute when the tick ISR
\r
207 vTaskSwitchContext();
\r
209 /* Clear the interrupt in the watchdog and EIC. */
\r
213 /*-----------------------------------------------------------*/
\r
215 static void prvSetupTimerInterrupt( void )
\r
217 /* Set the watchdog up to generate a periodic tick. */
\r
218 WDG_ECITConfig( DISABLE );
\r
219 WDG_CntOnOffConfig( DISABLE );
\r
220 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
\r
222 /* Setup the tick interrupt in the EIC. */
\r
223 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
\r
224 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
\r
225 EIC_IRQConfig( ENABLE );
\r
226 WDG_ECITConfig( ENABLE );
\r
228 /* Start the timer - interrupts are actually disabled at this point so
\r
229 it is safe to do this here. */
\r
230 WDG_CntOnOffConfig( ENABLE );
\r
232 /*-----------------------------------------------------------*/
\r
234 __arm __interwork void vPortEnterCritical( void )
\r
236 /* Disable interrupts first! */
\r
237 __disable_interrupt();
\r
239 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
240 directly. Increment ulCriticalNesting to keep a count of how many times
\r
241 portENTER_CRITICAL() has been called. */
\r
242 ulCriticalNesting++;
\r
244 /*-----------------------------------------------------------*/
\r
246 __arm __interwork void vPortExitCritical( void )
\r
248 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
\r
250 /* Decrement the nesting count as we are leaving a critical section. */
\r
251 ulCriticalNesting--;
\r
253 /* If the nesting level has reached zero then interrupts should be
\r
255 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
257 __enable_interrupt();
\r
261 /*-----------------------------------------------------------*/
\r