2 FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
7 it under the terms of the GNU General Public License as published by
\r
8 the Free Software Foundation; either version 2 of the License, or
\r
9 (at your option) any later version.
\r
11 FreeRTOS.org is distributed in the hope that it will be useful,
\r
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
14 GNU General Public License for more details.
\r
16 You should have received a copy of the GNU General Public License
\r
17 along with FreeRTOS.org; if not, write to the Free Software
\r
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
\r
20 A special exception to the GPL can be applied should you wish to distribute
\r
21 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
22 the source code for any proprietary components. See the licensing section
\r
23 of http://www.FreeRTOS.org for full details of how and when the exception
\r
26 ***************************************************************************
\r
28 Please ensure to read the configuration and relevant port sections of the
\r
29 online documentation.
\r
31 +++ http://www.FreeRTOS.org +++
\r
32 Documentation, latest information, license and contact details.
\r
34 +++ http://www.SafeRTOS.com +++
\r
35 A version that is certified for use in safety critical systems.
\r
37 +++ http://www.OpenRTOS.com +++
\r
38 Commercial support, development, porting, licensing and training services.
\r
40 ***************************************************************************
\r
43 /*-----------------------------------------------------------
\r
44 * Implementation of functions defined in portable.h for the ST STR71x ARM7
\r
46 *----------------------------------------------------------*/
\r
48 /* Library includes. */
\r
52 /* Standard includes. */
\r
55 /* Scheduler includes. */
\r
56 #include "FreeRTOS.h"
\r
59 /* Constants required to setup the initial stack. */
\r
60 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
\r
61 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
\r
63 /* Constants required to handle critical sections. */
\r
64 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
\r
66 #define portMICROS_PER_SECOND 1000000
\r
68 /*-----------------------------------------------------------*/
\r
70 /* Setup the watchdog to generate the tick interrupts. */
\r
71 static void prvSetupTimerInterrupt( void );
\r
73 /* ulCriticalNesting will get set to zero when the first task starts. It
\r
74 cannot be initialised to 0 as this will cause interrupts to be enabled
\r
75 during the kernel initialisation process. */
\r
76 unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
\r
78 /* Tick interrupt routines for cooperative and preemptive operation
\r
79 respectively. The preemptive version is not defined as __irq as it is called
\r
80 from an asm wrapper function. */
\r
81 __arm __irq void vPortNonPreemptiveTick( void );
\r
82 void vPortPreemptiveTick( void );
\r
84 /*-----------------------------------------------------------*/
\r
87 * Initialise the stack of a task to look exactly as if a call to
\r
88 * portSAVE_CONTEXT had been called.
\r
90 * See header file for description.
\r
92 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
94 portSTACK_TYPE *pxOriginalTOS;
\r
96 pxOriginalTOS = pxTopOfStack;
\r
98 /* Setup the initial stack of the task. The stack is set exactly as
\r
99 expected by the portRESTORE_CONTEXT() macro. */
\r
101 /* First on the stack is the return address - which in this case is the
\r
102 start of the task. The offset is added to make the return address appear
\r
103 as it would within an IRQ ISR. */
\r
104 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
\r
107 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
\r
109 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
\r
111 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
\r
113 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
\r
115 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
\r
117 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
\r
119 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
\r
121 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
\r
123 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
\r
125 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
\r
127 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
\r
129 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
\r
131 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
\r
133 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
\r
136 /* When the task starts is will expect to find the function parameter in
\r
138 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
141 /* The status register is set for system mode, with interrupts enabled. */
\r
142 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
\r
145 /* Interrupt flags cannot always be stored on the stack and will
\r
146 instead be stored in a variable, which is then saved as part of the
\r
148 *pxTopOfStack = portNO_CRITICAL_NESTING;
\r
150 return pxTopOfStack;
\r
152 /*-----------------------------------------------------------*/
\r
154 portBASE_TYPE xPortStartScheduler( void )
\r
156 extern void vPortStartFirstTask( void );
\r
158 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
160 prvSetupTimerInterrupt();
\r
162 /* Start the first task. */
\r
163 vPortStartFirstTask();
\r
165 /* Should not get here! */
\r
168 /*-----------------------------------------------------------*/
\r
170 void vPortEndScheduler( void )
\r
172 /* It is unlikely that the ARM port will require this function as there
\r
173 is nothing to return to. */
\r
175 /*-----------------------------------------------------------*/
\r
177 /* The cooperative scheduler requires a normal IRQ service routine to
\r
178 simply increment the system tick. */
\r
179 __arm __irq void vPortNonPreemptiveTick( void )
\r
181 /* Increment the tick count - which may wake some tasks but as the
\r
182 preemptive scheduler is not being used any woken task is not given
\r
183 processor time no matter what its priority. */
\r
184 vTaskIncrementTick();
\r
186 /* Clear the interrupt in the watchdog and EIC. */
\r
190 /*-----------------------------------------------------------*/
\r
192 /* This function is called from an asm wrapper, so does not require the __irq
\r
194 void vPortPreemptiveTick( void )
\r
196 /* Increment the tick counter. */
\r
197 vTaskIncrementTick();
\r
199 /* The new tick value might unblock a task. Ensure the highest task that
\r
200 is ready to execute is the task that will execute when the tick ISR
\r
202 vTaskSwitchContext();
\r
204 /* Clear the interrupt in the watchdog and EIC. */
\r
208 /*-----------------------------------------------------------*/
\r
210 static void prvSetupTimerInterrupt( void )
\r
212 /* Set the watchdog up to generate a periodic tick. */
\r
213 WDG_ECITConfig( DISABLE );
\r
214 WDG_CntOnOffConfig( DISABLE );
\r
215 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
\r
217 /* Setup the tick interrupt in the EIC. */
\r
218 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
\r
219 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
\r
220 EIC_IRQConfig( ENABLE );
\r
221 WDG_ECITConfig( ENABLE );
\r
223 /* Start the timer - interrupts are actually disabled at this point so
\r
224 it is safe to do this here. */
\r
225 WDG_CntOnOffConfig( ENABLE );
\r
227 /*-----------------------------------------------------------*/
\r
229 __arm __interwork void vPortEnterCritical( void )
\r
231 /* Disable interrupts first! */
\r
232 __disable_interrupt();
\r
234 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
235 directly. Increment ulCriticalNesting to keep a count of how many times
\r
236 portENTER_CRITICAL() has been called. */
\r
237 ulCriticalNesting++;
\r
239 /*-----------------------------------------------------------*/
\r
241 __arm __interwork void vPortExitCritical( void )
\r
243 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
\r
245 /* Decrement the nesting count as we are leaving a critical section. */
\r
246 ulCriticalNesting--;
\r
248 /* If the nesting level has reached zero then interrupts should be
\r
250 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
252 __enable_interrupt();
\r
256 /*-----------------------------------------------------------*/
\r