2 FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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33 /*-----------------------------------------------------------
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34 * Implementation of functions defined in portable.h for the ST STR75x ARM7
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36 *----------------------------------------------------------*/
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38 /* Library includes. */
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40 #include "75x_eic.h"
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42 /* Scheduler includes. */
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43 #include "FreeRTOS.h"
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46 /* Constants required to setup the initial stack. */
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47 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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48 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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50 /* Constants required to handle critical sections. */
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51 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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53 /* Prescale used on the timer clock when calculating the tick period. */
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54 #define portPRESCALE 20
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57 /*-----------------------------------------------------------*/
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59 /* Setup the TB to generate the tick interrupts. */
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60 static void prvSetupTimerInterrupt( void );
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62 /* ulCriticalNesting will get set to zero when the first task starts. It
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63 cannot be initialised to 0 as this will cause interrupts to be enabled
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64 during the kernel initialisation process. */
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65 unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
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67 /* Tick interrupt routines for preemptive operation. */
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68 __arm void vPortPreemptiveTick( void );
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70 /*-----------------------------------------------------------*/
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73 * Initialise the stack of a task to look exactly as if a call to
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74 * portSAVE_CONTEXT had been called.
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76 * See header file for description.
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78 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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80 portSTACK_TYPE *pxOriginalTOS;
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82 pxOriginalTOS = pxTopOfStack;
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84 /* Setup the initial stack of the task. The stack is set exactly as
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85 expected by the portRESTORE_CONTEXT() macro. */
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87 /* First on the stack is the return address - which in this case is the
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88 start of the task. The offset is added to make the return address appear
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89 as it would within an IRQ ISR. */
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90 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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93 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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95 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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97 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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99 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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101 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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103 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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105 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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107 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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109 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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111 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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113 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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115 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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117 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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119 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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122 /* When the task starts is will expect to find the function parameter in
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124 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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127 /* The status register is set for system mode, with interrupts enabled. */
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128 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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131 /* Interrupt flags cannot always be stored on the stack and will
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132 instead be stored in a variable, which is then saved as part of the
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134 *pxTopOfStack = portNO_CRITICAL_NESTING;
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136 return pxTopOfStack;
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138 /*-----------------------------------------------------------*/
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140 portBASE_TYPE xPortStartScheduler( void )
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142 extern void vPortStartFirstTask( void );
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144 /* Start the timer that generates the tick ISR. Interrupts are disabled
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146 prvSetupTimerInterrupt();
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148 /* Start the first task. */
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149 vPortStartFirstTask();
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151 /* Should not get here! */
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154 /*-----------------------------------------------------------*/
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156 void vPortEndScheduler( void )
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158 /* It is unlikely that the ARM port will require this function as there
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159 is nothing to return to. */
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161 /*-----------------------------------------------------------*/
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163 __arm void vPortPreemptiveTick( void )
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165 /* Increment the tick counter. */
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166 vTaskIncrementTick();
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168 /* The new tick value might unblock a task. Ensure the highest task that
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169 is ready to execute is the task that will execute when the tick ISR
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171 #if configUSE_PREEMPTION == 1
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172 vTaskSwitchContext();
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175 TB_ClearITPendingBit( TB_IT_Update );
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177 /*-----------------------------------------------------------*/
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179 static void prvSetupTimerInterrupt( void )
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181 EIC_IRQInitTypeDef EIC_IRQInitStructure;
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182 TB_InitTypeDef TB_InitStructure;
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184 /* Setup the EIC for the TB. */
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185 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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186 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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187 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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188 EIC_IRQInit(&EIC_IRQInitStructure);
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190 /* Setup the TB for the generation of the tick interrupt. */
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191 TB_InitStructure.TB_Mode = TB_Mode_Timing;
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192 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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193 TB_InitStructure.TB_Prescaler = portPRESCALE;
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194 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / ( portPRESCALE + 1 ) ) / configTICK_RATE_HZ ) + 1;
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195 TB_Init(&TB_InitStructure);
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197 /* Enable TB Update interrupt */
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198 TB_ITConfig(TB_IT_Update, ENABLE);
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200 /* Clear TB Update interrupt pending bit */
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201 TB_ClearITPendingBit(TB_IT_Update);
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206 /*-----------------------------------------------------------*/
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208 __arm __interwork void vPortEnterCritical( void )
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210 /* Disable interrupts first! */
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211 __disable_interrupt();
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213 /* Now interrupts are disabled ulCriticalNesting can be accessed
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214 directly. Increment ulCriticalNesting to keep a count of how many times
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215 portENTER_CRITICAL() has been called. */
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216 ulCriticalNesting++;
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218 /*-----------------------------------------------------------*/
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220 __arm __interwork void vPortExitCritical( void )
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222 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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224 /* Decrement the nesting count as we are leaving a critical section. */
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225 ulCriticalNesting--;
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227 /* If the nesting level has reached zero then interrupts should be
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229 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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231 __enable_interrupt();
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235 /*-----------------------------------------------------------*/
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