2 FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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31 Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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32 with commercial development and support options.
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33 ***************************************************************************
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37 /*-----------------------------------------------------------
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38 * Implementation of functions defined in portable.h for the ARM7 port
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39 * using the Keil compiler.
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41 * Components that can be compiled to either ARM or THUMB mode are
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42 * contained in this file. The ISR routines, which can only be compiled
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43 * to ARM mode are contained in portISR.c.
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44 *----------------------------------------------------------*/
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49 + Bug fix - The prescale value for the timer setup is now written to T0PR
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50 instead of T0PC. This bug would have had no effect unless a prescale
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51 value was actually used.
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54 /* Standard includes. */
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57 /* Scheduler includes. */
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58 #include "FreeRTOS.h"
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61 /* Constants required to setup the initial task context. */
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62 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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63 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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64 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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65 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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67 /* Constants required to setup the tick ISR. */
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68 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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69 #define portPRESCALE_VALUE 0x00
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70 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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71 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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73 /* Constants required to setup the VIC for the tick ISR. */
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74 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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75 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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76 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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78 /*-----------------------------------------------------------*/
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80 /* Setup the timer to generate the tick interrupts. */
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81 static void prvSetupTimerInterrupt( void );
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84 * The scheduler can only be started from ARM mode, so
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85 * vPortISRStartFirstSTask() is defined in portISR.c.
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87 extern void vPortISRStartFirstTask( void );
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89 /*-----------------------------------------------------------*/
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92 * See header file for description.
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94 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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96 portSTACK_TYPE *pxOriginalTOS;
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98 /* Setup the initial stack of the task. The stack is set exactly as
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99 expected by the portRESTORE_CONTEXT() macro.
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101 Remember where the top of the (simulated) stack is before we place
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103 pxOriginalTOS = pxTopOfStack;
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105 /* First on the stack is the return address - which in this case is the
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106 start of the task. The offset is added to make the return address appear
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107 as it would within an IRQ ISR. */
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108 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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111 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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113 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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115 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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117 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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119 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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121 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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123 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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125 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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127 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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129 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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131 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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133 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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135 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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137 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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139 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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142 /* The last thing onto the stack is the status register, which is set for
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143 system mode, with interrupts enabled. */
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144 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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146 #ifdef KEIL_THUMB_INTERWORK
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148 /* We want the task to start in thumb mode. */
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149 *pxTopOfStack |= portTHUMB_MODE_BIT;
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155 /* The code generated by the Keil compiler does not maintain separate
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156 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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157 use the stack as per other ports. Instead a variable is used to keep
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158 track of the critical section nesting. This variable has to be stored
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159 as part of the task context and is initially set to zero. */
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160 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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162 return pxTopOfStack;
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164 /*-----------------------------------------------------------*/
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166 portBASE_TYPE xPortStartScheduler( void )
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168 /* Start the timer that generates the tick ISR. */
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169 prvSetupTimerInterrupt();
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171 /* Start the first task. This is done from portISR.c as ARM mode must be
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173 vPortISRStartFirstTask();
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175 /* Should not get here! */
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178 /*-----------------------------------------------------------*/
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180 void vPortEndScheduler( void )
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182 /* It is unlikely that the ARM port will require this function as there
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183 is nothing to return to. If this is required - stop the tick ISR then
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184 return back to main. */
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186 /*-----------------------------------------------------------*/
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188 static void prvSetupTimerInterrupt( void )
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190 unsigned portLONG ulCompareMatch;
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192 /* A 1ms tick does not require the use of the timer prescale. This is
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193 defaulted to zero but can be used if necessary. */
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194 T0PR = portPRESCALE_VALUE;
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196 /* Calculate the match value required for our wanted tick rate. */
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197 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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199 /* Protect against divide by zero. Using an if() statement still results
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200 in a warning - hence the #if. */
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201 #if portPRESCALE_VALUE != 0
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203 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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207 T0MR0 = ulCompareMatch;
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209 /* Generate tick with timer 0 compare match. */
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210 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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212 /* Setup the VIC for the timer. */
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213 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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214 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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216 /* The ISR installed depends on whether the preemptive or cooperative
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217 scheduler is being used. */
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218 #if configUSE_PREEMPTION == 1
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220 #ifdef KEIL_THUMB_INTERWORK
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221 extern void ( vPreemptiveTick )( void ) __arm __task;
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223 extern void ( vPreemptiveTick )( void ) __task;
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226 VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;
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230 extern void ( vNonPreemptiveTick )( void ) __irq;
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232 VICVectAddr0 = ( portLONG ) vNonPreemptiveTick;
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236 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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238 /* Start the timer - interrupts are disabled when this function is called
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239 so it is okay to do this here. */
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240 T0TCR = portENABLE_TIMER;
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242 /*-----------------------------------------------------------*/
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