git.sur5r.net Git - freertos/blob - Source/portable/Keil/ARM7/portmacro.h

   1 /*\r
   2         FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27         See http://www.FreeRTOS.org for documentation, latest information, license \r
  28         and contact details.  Please ensure to read the configuration and relevant \r
  29         port sections of the online documentation.\r
  30 \r
  31         Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
  32         with commercial development and support options.\r
  33         ***************************************************************************\r
  34 */\r
  35 \r
  36 \r
  37 #ifndef PORTMACRO_H\r
  38 #define PORTMACRO_H\r
  39 \r
  40 /*-----------------------------------------------------------\r
  41  * Port specific definitions.  \r
  42  *\r
  43  * The settings in this file configure FreeRTOS correctly for the\r
  44  * given hardware and compiler.\r
  45  *\r
  46  * These settings should not be altered.\r
  47  *-----------------------------------------------------------\r
  48  */\r
  49 \r
  50 /* Type definitions. */\r
  51 #define portCHAR                char\r
  52 #define portFLOAT               float\r
  53 #define portDOUBLE              double\r
  54 #define portLONG                long\r
  55 #define portSHORT               short\r
  56 #define portSTACK_TYPE  unsigned portLONG\r
  57 #define portBASE_TYPE   portLONG\r
  58 \r
  59 #if( configUSE_16_BIT_TICKS == 1 )\r
  60         typedef unsigned portSHORT portTickType;\r
  61         #define portMAX_DELAY ( portTickType ) 0xffff\r
  62 #else\r
  63         typedef unsigned portLONG portTickType;\r
  64         #define portMAX_DELAY ( portTickType ) 0xffffffff\r
  65 #endif\r
  66 /*-----------------------------------------------------------*/ \r
  67 \r
  68 /* Hardware specifics. */\r
  69 #define portSTACK_GROWTH                        ( -1 )\r
  70 #define portTICK_RATE_MS                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
  71 #define portBYTE_ALIGNMENT                      4\r
  72 /*-----------------------------------------------------------*/ \r
  73 \r
  74 /* Task utilities. */\r
  75 #define portRESTORE_CONTEXT()                                                                                                                                                   \\r
  76 {                                                                                                                                                                                                               \\r
  77 extern volatile unsigned portLONG ulCriticalNesting;                                                                                                    \\r
  78 extern volatile void * volatile pxCurrentTCB;                                                                                                                   \\r
  79                                                                                                                                                                                                                 \\r
  80         __asm{ LDR              R1, =pxCurrentTCB };/* Set the LR to the task stack.  The location was ... */           \\r
  81         __asm{ LDR              R0, [R1]                };      /* ... stored in pxCurrentTCB. */                                                               \\r
  82         __asm{ LDR              LR, [R0]                };                                                                                                                                      \\r
  83                                                                                                                                                                                                                 \\r
  84         __asm{ LDR              R0, =ulCriticalNesting }; /* The critical nesting depth is the first item on ... */     \\r
  85         __asm{ LDMFD    LR!, {R1 }              }  /* ... the stack.  Load it into the ulCriticalNesting var. */        \\r
  86         __asm{ STR              R1, [R0]                }                                                                                                                                       \\r
  87                                                                                                                                                                                                                 \\r
  88         __asm{ LDMFD    LR!, {R0}               }; /* Get the SPSR from the stack. */                                                           \\r
  89         __asm{ MSR              SPSR_CXSF, R0   };                                                                                                                                      \\r
  90                                                                                                                                                                                                                 \\r
  91         __asm{ LDMFD    LR, {R0-R14}^   }; /* Restore all system mode registers for the task. */                        \\r
  92         __asm{ NOP                                              };                                                                                                                                      \\r
  93                                                                                                                                                                                                                 \\r
  94         __asm{ LDR              LR, [LR, #+60]  }; /* Restore the return address. */                                                            \\r
  95                                                                                                                                                                                                                 \\r
  96                                                                            /* And return - correcting the offset in the LR to obtain ... */ \\r
  97         __asm{ SUBS     PC, LR, #4                      }; /* ... the correct address. */                                                                       \\r
  98 }\r
  99 /*----------------------------------------------------------*/\r
 100 \r
 101 #define portSAVE_CONTEXT()                                                                                                                                                              \\r
 102 {                                                                                                                                                                                                               \\r
 103 extern volatile unsigned portLONG ulCriticalNesting;                                                                                                    \\r
 104 extern volatile void * volatile pxCurrentTCB;                                                                                                                   \\r
 105                                                                                                                                                                                                                 \\r
 106         __asm{ STMDB    SP!, {R0}               };      /* Store R0 first as we need to use it.                                         */      \\r
 107                                                                                                                                                                                                                 \\r
 108         __asm{ STMDB    SP,{SP}^                }; /* Set R0 to point to the task stack pointer.                                */      \\r
 109         __asm{ NOP                                              };                                                                                                                                      \\r
 110         __asm{ SUB              SP, SP, #4              };                                                                                                                                      \\r
 111         __asm{ LDMIA    SP!,{R0}                };                                                                                                                                      \\r
 112                                                                                                                                                                                                                 \                                                                                                                                       \r
 113         __asm{ STMDB    R0!, {LR}               }; /* Push the return address onto the stack.                                   */      \\r
 114         __asm{ MOV              LR, R0                  }; /* Now we have saved LR we can use it instead of R0.                 */      \\r
 115         __asm{ LDMIA    SP!, {R0}               }; /* Pop R0 so we can save it onto the system mode stack.              */      \\r
 116                                                                                                                                                                                                                 \\r
 117         __asm{ STMDB    LR,{R0-LR}^             }; /* Push all the system mode registers onto the task stack.   */      \\r
 118         __asm{ NOP                                              };                                                                                                                                      \\r
 119         __asm{ SUB              LR, LR, #60             };                                                                                                                                      \\r
 120                                                                                                                                                                                                                 \\r
 121         __asm{ MRS              R0, SPSR                }; /* Push the SPSR onto the task stack.                                                */      \\r
 122         __asm{ STMDB    LR!, {R0}               };                                                                                                                                      \\r
 123                                                                                                                                                                                                                 \\r
 124         __asm{ LDR              R0, =ulCriticalNesting };                                                                                                                       \\r
 125         __asm{ LDR              R0, [R0]                };                                                                                                                                      \\r
 126         __asm{ STMDB    LR!, {R0}               };                                                                                                                                      \\r
 127                                                                                                                                                                                                                 \\r
 128         __asm{ LDR              R0, =pxCurrentTCB };/* Store the new top of stack for the task.                                 */      \\r
 129         __asm{ LDR              R1, [R0]                };                                                                                                                                      \\r
 130         __asm{ STR              LR, [R1]                };                                                                                                                                      \\r
 131 }\r
 132 \r
 133 /*-----------------------------------------------------------\r
 134  * ISR entry and exit macros.  These are only required if a task switch\r
 135  * is required from an ISR.\r
 136  *----------------------------------------------------------*/\r
 137 \r
 138 #define portENTER_SWITCHING_ISR()                                                                               \\r
 139                 portSAVE_CONTEXT();                                                                                             \\r
 140                 {\r
 141 \r
 142 #define portEXIT_SWITCHING_ISR( SwitchRequired )                                                \\r
 143                 /* If a switch is required then we just need to call */                 \\r
 144                 /* vTaskSwitchContext() as the context has already been */              \\r
 145                 /* saved. */                                                                                                    \\r
 146                 if( SwitchRequired )                                                                                    \\r
 147                 {                                                                                                                               \\r
 148                         vTaskSwitchContext();                                                                           \\r
 149                 }                                                                                                                               \\r
 150         }                                                                                                                                       \\r
 151         /* Restore the context of which ever task is now the highest */         \\r
 152         /* priority that is ready to run. */                                                            \\r
 153         portRESTORE_CONTEXT();\r
 154 \r
 155 \r
 156 /* Yield the processor - force a context switch. */\r
 157 #define portYIELD()                                     __asm{ SWI 0 }; \r
 158 /*-----------------------------------------------------------*/ \r
 159 \r
 160 /* Critical section management. */\r
 161 \r
 162 /*-----------------------------------------------------------\r
 163  * Interrupt control macros.\r
 164  *\r
 165  * The interrupt management utilities can only be called from ARM mode.  When\r
 166  * KEIL_THUMB_INTERWORK is defined the utilities are defined as functions in \r
 167  * portISR.c to ensure a switch to ARM mode.  When KEIL_THUMB_INTERWORK is not \r
 168  * defined then the utilities are defined as macros here - as per other ports.\r
 169  *----------------------------------------------------------*/\r
 170 \r
 171 #ifdef KEIL_THUMB_INTERWORK\r
 172 \r
 173         extern void vPortDisableInterruptsFromThumb( void ) __task;\r
 174         extern void vPortEnableInterruptsFromThumb( void ) __task;\r
 175 \r
 176         #define portDISABLE_INTERRUPTS()        vPortDisableInterruptsFromThumb()\r
 177         #define portENABLE_INTERRUPTS()         vPortEnableInterruptsFromThumb()\r
 178 \r
 179 #else\r
 180 \r
 181         /*-----------------------------------------------------------*/\r
 182 \r
 183         #define portDISABLE_INTERRUPTS()                                                                                                                \\r
 184                 __asm{ STMDB    SP!, {R0}               };      /* Push R0.                                                                     */      \\r
 185                 __asm{ MRS              R0, CPSR                };      /* Get CPSR.                                                            */      \\r
 186                 __asm{ ORR              R0, R0, #0xC0   };      /* Disable IRQ, FIQ.                                            */      \\r
 187                 __asm{ MSR              CPSR_CXSF, R0   };      /* Write back modified value.                           */      \\r
 188                 __asm{ LDMIA    SP!, {R0}               }       /* Pop R0.                                                                      */\r
 189                         \r
 190         #define portENABLE_INTERRUPTS()                                                                                                                 \\r
 191                 __asm{ STMDB    SP!, {R0}               };      /* Push R0.                                                                     */      \\r
 192                 __asm{ MRS              R0, CPSR                };      /* Get CPSR.                                                            */      \\r
 193                 __asm{ BIC              R0, R0, #0xC0   };      /* Enable IRQ, FIQ.                                                     */      \\r
 194                 __asm{ MSR              CPSR_CXSF, R0   };      /* Write back modified value.                           */      \\r
 195                 __asm{ LDMIA    SP!, {R0}               }       /* Pop R0. */\r
 196 \r
 197 #endif /* KEIL_THUMB_INTERWORK */\r
 198 \r
 199 /*-----------------------------------------------------------\r
 200  * Critical section control\r
 201  *\r
 202  * The code generated by the Keil compiler does not maintain separate\r
 203  * stack and frame pointers. The portENTER_CRITICAL macro cannot therefore\r
 204  * use the stack as per other ports.  Instead a variable is used to keep\r
 205  * track of the critical section nesting.  This necessitates the use of a \r
 206  * function in place of the macro.\r
 207  *----------------------------------------------------------*/\r
 208 \r
 209 extern void vPortEnterCritical( void );\r
 210 extern void vPortExitCritical( void );\r
 211 \r
 212 #define portENTER_CRITICAL()            vPortEnterCritical();\r
 213 #define portEXIT_CRITICAL()                     vPortExitCritical();\r
 214 /*-----------------------------------------------------------*/ \r
 215 \r
 216 /* Compiler specifics. */\r
 217 #define inline\r
 218 #define register\r
 219 #define portNOP()       __asm{ NOP }\r
 220 /*-----------------------------------------------------------*/ \r
 221 \r
 222 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 223 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )      void vFunction( void *pvParameters ) __task\r
 224 #define portTASK_FUNCTION( vFunction, pvParameters )    void vFunction( void *pvParameters )\r
 225 \r
 226 #endif /* PORTMACRO_H */\r
 227 \r