git.sur5r.net Git - freertos/blob - Source/portable/MPLAB/PIC18F/port.c

   1 /*\r
   2         FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27 \r
  28         Please ensure to read the configuration and relevant port sections of the \r
  29         online documentation.\r
  30 \r
  31         +++ http://www.FreeRTOS.org +++\r
  32         Documentation, latest information, license and contact details.  \r
  33 \r
  34         +++ http://www.SafeRTOS.com +++\r
  35         A version that is certified for use in safety critical systems.\r
  36 \r
  37         +++ http://www.OpenRTOS.com +++\r
  38         Commercial support, development, porting, licensing and training services.\r
  39 \r
  40         ***************************************************************************\r
  41 */\r
  42 \r
  43 /* \r
  44 Changes between V1.2.4 and V1.2.5\r
  45 \r
  46         + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global \r
  47           interrupt flag setting.  Using the two bits defined within\r
  48           portINITAL_INTERRUPT_STATE was causing the w register to get clobbered\r
  49           before the test was performed.\r
  50 \r
  51 Changes from V1.2.5\r
  52 \r
  53         + Set the interrupt vector address to 0x08.  Previously it was at the\r
  54           incorrect address for compatibility mode of 0x18.\r
  55 \r
  56 Changes from V2.1.1\r
  57 \r
  58         + PCLATU and PCLATH are now saved as part of the context.  This allows\r
  59           function pointers to be used within tasks.  Thanks to Javier Espeche\r
  60           for the enhancement. \r
  61 \r
  62 Changes from V2.3.1\r
  63 \r
  64         + TABLAT is now saved as part of the task context.\r
  65         \r
  66 Changes from V3.2.0\r
  67 \r
  68         + TBLPTRU is now initialised to zero as the MPLAB compiler expects this\r
  69           value and does not write to the register.\r
  70 */\r
  71 \r
  72 /* Scheduler include files. */\r
  73 #include "FreeRTOS.h"\r
  74 #include "task.h"\r
  75 \r
  76 /* MPLAB library include file. */\r
  77 #include "timers.h"\r
  78 \r
  79 /*-----------------------------------------------------------\r
  80  * Implementation of functions defined in portable.h for the PIC port.\r
  81  *----------------------------------------------------------*/\r
  82 \r
  83 /* Hardware setup for tick. */\r
  84 #define portTIMER_FOSC_SCALE                    ( ( unsigned portLONG ) 4 )\r
  85 \r
  86 /* Initial interrupt enable state for newly created tasks.  This value is\r
  87 copied into INTCON when a task switches in for the first time. */\r
  88 #define portINITAL_INTERRUPT_STATE                      0xc0\r
  89 \r
  90 /* Just the bit within INTCON for the global interrupt flag. */\r
  91 #define portGLOBAL_INTERRUPT_FLAG                       0x80\r
  92 \r
  93 /* Constant used for context switch macro when we require the interrupt \r
  94 enable state to be unchanged when the interrupted task is switched back in. */\r
  95 #define portINTERRUPTS_UNCHANGED                        0x00\r
  96 \r
  97 /* Some memory areas get saved as part of the task context.  These memory\r
  98 area's get used by the compiler for temporary storage, especially when \r
  99 performing mathematical operations, or when using 32bit data types.  This\r
 100 constant defines the size of memory area which must be saved. */\r
 101 #define portCOMPILER_MANAGED_MEMORY_SIZE        ( ( unsigned portCHAR ) 0x13 )\r
 102 \r
 103 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
 104 any details of its type. */\r
 105 typedef void tskTCB;\r
 106 extern volatile tskTCB * volatile pxCurrentTCB;\r
 107 \r
 108 /* IO port constants. */\r
 109 #define portBIT_SET             ( ( unsigned portCHAR ) 1 )\r
 110 #define portBIT_CLEAR   ( ( unsigned portCHAR ) 0 )\r
 111 \r
 112 /*\r
 113  * The serial port ISR's are defined in serial.c, but are called from portable\r
 114  * as they use the same vector as the tick ISR.\r
 115  */\r
 116 void vSerialTxISR( void );\r
 117 void vSerialRxISR( void );\r
 118 \r
 119 /*\r
 120  * Perform hardware setup to enable ticks.\r
 121  */\r
 122 static void prvSetupTimerInterrupt( void );\r
 123 \r
 124 /* \r
 125  * ISR to maintain the tick, and perform tick context switches if the\r
 126  * preemptive scheduler is being used.\r
 127  */\r
 128 static void prvTickISR( void );\r
 129 \r
 130 /*\r
 131  * ISR placed on the low priority vector.  This calls the appropriate ISR for\r
 132  * the actual interrupt.\r
 133  */\r
 134 static void prvLowInterrupt( void );\r
 135 \r
 136 /* \r
 137  * Macro that pushes all the registers that make up the context of a task onto\r
 138  * the stack, then saves the new top of stack into the TCB.\r
 139  * \r
 140  * If this is called from an ISR then the interrupt enable bits must have been \r
 141  * set for the ISR to ever get called.  Therefore we want to save the INTCON\r
 142  * register with the enable bits forced to be set - and ucForcedInterruptFlags \r
 143  * must contain these bit settings.  This means the interrupts will again be\r
 144  * enabled when the interrupted task is switched back in.\r
 145  *\r
 146  * If this is called from a manual context switch (i.e. from a call to yield),\r
 147  * then we want to save the INTCON so it is restored with its current state,\r
 148  * and ucForcedInterruptFlags must be 0.  This allows a yield from within\r
 149  * a critical section.\r
 150  *\r
 151  * The compiler uses some locations at the bottom of the memory for temporary\r
 152  * storage during math and other computations.  This is especially true if\r
 153  * 32bit data types are utilised (as they are by the scheduler).  The .tmpdata\r
 154  * and MATH_DATA sections have to be stored in there entirety as part of a task\r
 155  * context.  This macro stores from data address 0x00 to \r
 156  * portCOMPILER_MANAGED_MEMORY_SIZE.  This is sufficient for the demo \r
 157  * applications but you should check the map file for your project to ensure \r
 158  * this is sufficient for your needs.  It is not clear whether this size is \r
 159  * fixed for all compilations or has the potential to be program specific.\r
 160  */\r
 161 #define portSAVE_CONTEXT( ucForcedInterruptFlags )                                                              \\r
 162 {                                                                                                                                                               \\r
 163         _asm                                                                                                                                            \\r
 164                 /* Save the status and WREG registers first, as these will get modified \\r
 165                 by the operations below. */                                                                                             \\r
 166                 MOVFF   WREG, PREINC1                                                                                                   \\r
 167                 MOVFF   STATUS, PREINC1                                                                                                 \\r
 168                 /* Save the INTCON register with the appropriate bits forced if                 \\r
 169                 necessary - as described above. */                                                                              \\r
 170                 MOVFF   INTCON, WREG                                                                                                    \\r
 171                 IORLW   ucForcedInterruptFlags                                                                                  \\r
 172                 MOVFF   WREG, PREINC1                                                                                                   \\r
 173         _endasm                                                                                                                                         \\r
 174                                                                                                                                                                 \\r
 175         portDISABLE_INTERRUPTS();                                                                                                       \\r
 176                                                                                                                                                                 \\r
 177         _asm                                                                                                                                            \\r
 178                 /* Store the necessary registers to the stack. */                                               \\r
 179                 MOVFF   BSR, PREINC1                                                                                                    \\r
 180                 MOVFF   FSR2L, PREINC1                                                                                                  \\r
 181                 MOVFF   FSR2H, PREINC1                                                                                                  \\r
 182                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
 183                 MOVFF   FSR0H, PREINC1                                                                                                  \\r
 184                 MOVFF   TABLAT, PREINC1                                                                                                 \\r
 185                 MOVFF   TBLPTRU, PREINC1                                                                                                \\r
 186                 MOVFF   TBLPTRH, PREINC1                                                                                                \\r
 187                 MOVFF   TBLPTRL, PREINC1                                                                                                \\r
 188                 MOVFF   PRODH, PREINC1                                                                                                  \\r
 189                 MOVFF   PRODL, PREINC1                                                                                                  \\r
 190                 MOVFF   PCLATU, PREINC1                                                                                                 \\r
 191                 MOVFF   PCLATH, PREINC1                                                                                                 \\r
 192                 /* Store the .tempdata and MATH_DATA areas as described above. */               \\r
 193                 CLRF    FSR0L, 0                                                                                                                \\r
 194                 CLRF    FSR0H, 0                                                                                                                \\r
 195                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 196                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 197                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 198                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 199                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 200                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 201                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 202                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 203                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 204                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 205                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 206                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 207                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 208                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 209                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 210                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 211                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 212                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 213                 MOVFF   POSTINC0, PREINC1                                                                                               \\r
 214                 MOVFF   INDF0, PREINC1                                                                                                  \\r
 215                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
 216                 MOVFF   FSR0H, PREINC1                                                                                                  \\r
 217                 /* Store the hardware stack pointer in a temp register before we                \\r
 218                 modify it. */                                                                                                                   \\r
 219                 MOVFF   STKPTR, FSR0L                                                                                                   \\r
 220         _endasm                                                                                                                                         \\r
 221                                                                                                                                                                 \\r
 222                 /* Store each address from the hardware stack. */                                               \\r
 223                 while( STKPTR > ( unsigned portCHAR ) 0 )                                                               \\r
 224                 {                                                                                                                                               \\r
 225                         _asm                                                                                                                            \\r
 226                                 MOVFF   TOSL, PREINC1                                                                                   \\r
 227                                 MOVFF   TOSH, PREINC1                                                                                   \\r
 228                                 MOVFF   TOSU, PREINC1                                                                                   \\r
 229                                 POP                                                                                                                             \\r
 230                         _endasm                                                                                                                         \\r
 231                 }                                                                                                                                               \\r
 232                                                                                                                                                                 \\r
 233         _asm                                                                                                                                            \\r
 234                 /* Store the number of addresses on the hardware stack (from the                \\r
 235                 temporary register). */                                                                                                 \\r
 236                 MOVFF   FSR0L, PREINC1                                                                                                  \\r
 237                 MOVF    PREINC1, 1, 0                                                                                                   \\r
 238         _endasm                                                                                                                                         \\r
 239                                                                                                                                                                 \\r
 240         /* Save the new top of the software stack in the TCB. */                                        \\r
 241         _asm                                                                                                                                            \\r
 242                 MOVFF   pxCurrentTCB, FSR0L                                                                                             \\r
 243                 MOVFF   pxCurrentTCB + 1, FSR0H                                                                                 \\r
 244                 MOVFF   FSR1L, POSTINC0                                                                                                 \\r
 245                 MOVFF   FSR1H, POSTINC0                                                                                                 \\r
 246         _endasm                                                                                                                                         \\r
 247 }\r
 248 /*-----------------------------------------------------------*/\r
 249 \r
 250 /*\r
 251  * This is the reverse of portSAVE_CONTEXT.  See portSAVE_CONTEXT for more\r
 252  * details.\r
 253  */\r
 254 #define portRESTORE_CONTEXT()                                                                                                   \\r
 255 {                                                                                                                                                               \\r
 256         _asm                                                                                                                                            \\r
 257                 /* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */                                  \\r
 258                 MOVFF   pxCurrentTCB, FSR0L                                                                                             \\r
 259                 MOVFF   pxCurrentTCB + 1, FSR0H                                                                                 \\r
 260                                                                                                                                                                 \\r
 261                 /* De-reference FSR0 to set the address it holds into FSR1.                             \\r
 262                 (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */                                                             \\r
 263                 MOVFF   POSTINC0, FSR1L                                                                                                 \\r
 264                 MOVFF   POSTINC0, FSR1H                                                                                                 \\r
 265                                                                                                                                                                 \\r
 266                 /* How many return addresses are there on the hardware stack?  Discard  \\r
 267                 the first byte as we are pointing to the next free space. */                    \\r
 268                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
 269                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
 270         _endasm                                                                                                                                         \\r
 271                                                                                                                                                                 \\r
 272         /* Fill the hardware stack from our software stack. */                                          \\r
 273         STKPTR = 0;                                                                                                                                     \\r
 274                                                                                                                                                                 \\r
 275         while( STKPTR < FSR0L )                                                                                                         \\r
 276         {                                                                                                                                                       \\r
 277                 _asm                                                                                                                                    \\r
 278                         PUSH                                                                                                                            \\r
 279                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
 280                         MOVWF   TOSU, 0                                                                                                         \\r
 281                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
 282                         MOVWF   TOSH, 0                                                                                                         \\r
 283                         MOVF    POSTDEC1, 0, 0                                                                                          \\r
 284                         MOVWF   TOSL, 0                                                                                                         \\r
 285                 _endasm                                                                                                                                 \\r
 286         }                                                                                                                                                       \\r
 287                                                                                                                                                                 \\r
 288         _asm                                                                                                                                            \\r
 289                 /* Restore the .tmpdata and MATH_DATA memory. */                                                \\r
 290                 MOVFF   POSTDEC1, FSR0H                                                                                                 \\r
 291                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
 292                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 293                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 294                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 295                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 296                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 297                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 298                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 299                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 300                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 301                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 302                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 303                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 304                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 305                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 306                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 307                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 308                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 309                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 310                 MOVFF   POSTDEC1, POSTDEC0                                                                                              \\r
 311                 MOVFF   POSTDEC1, INDF0                                                                                                 \\r
 312                 /* Restore the other registers forming the tasks context. */                    \\r
 313                 MOVFF   POSTDEC1, PCLATH                                                                                                \\r
 314                 MOVFF   POSTDEC1, PCLATU                                                                                                \\r
 315                 MOVFF   POSTDEC1, PRODL                                                                                                 \\r
 316                 MOVFF   POSTDEC1, PRODH                                                                                                 \\r
 317                 MOVFF   POSTDEC1, TBLPTRL                                                                                               \\r
 318                 MOVFF   POSTDEC1, TBLPTRH                                                                                               \\r
 319                 MOVFF   POSTDEC1, TBLPTRU                                                                                               \\r
 320                 MOVFF   POSTDEC1, TABLAT                                                                                                \\r
 321                 MOVFF   POSTDEC1, FSR0H                                                                                                 \\r
 322                 MOVFF   POSTDEC1, FSR0L                                                                                                 \\r
 323                 MOVFF   POSTDEC1, FSR2H                                                                                                 \\r
 324                 MOVFF   POSTDEC1, FSR2L                                                                                                 \\r
 325                 MOVFF   POSTDEC1, BSR                                                                                                   \\r
 326                 /* The next byte is the INTCON register.  Read this into WREG as some   \\r
 327                 manipulation is required. */                                                                                    \\r
 328                 MOVFF   POSTDEC1, WREG                                                                                                  \\r
 329         _endasm                                                                                                                                         \\r
 330                                                                                                                                                                 \\r
 331         /* From the INTCON register, only the interrupt enable bits form part           \\r
 332         of the tasks context.  It is perfectly legitimate for another task to           \\r
 333         have modified any other bits.  We therefore only restore the top two bits.      \\r
 334         */                                                                                                                                                      \\r
 335         if( WREG & portGLOBAL_INTERRUPT_FLAG )                                                                          \\r
 336         {                                                                                                                                                       \\r
 337                 _asm                                                                                                                                    \\r
 338                         MOVFF   POSTDEC1, STATUS                                                                                        \\r
 339                         MOVFF   POSTDEC1, WREG                                                                                          \\r
 340                         /* Return enabling interrupts. */                                                                       \\r
 341                         RETFIE  0                                                                                                                       \\r
 342                 _endasm                                                                                                                                 \\r
 343         }                                                                                                                                                       \\r
 344         else                                                                                                                                            \\r
 345         {                                                                                                                                                       \\r
 346                 _asm                                                                                                                                    \\r
 347                         MOVFF   POSTDEC1, STATUS                                                                                        \\r
 348                         MOVFF   POSTDEC1, WREG                                                                                          \\r
 349                         /* Return without effecting interrupts.  The context may have           \\r
 350                         been saved from a critical region. */                                                           \\r
 351                         RETURN  0                                                                                                                       \\r
 352                 _endasm                                                                                                                                 \\r
 353         }                                                                                                                                                       \\r
 354 }\r
 355 /*-----------------------------------------------------------*/\r
 356 \r
 357 /* \r
 358  * See header file for description. \r
 359  */\r
 360 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 361 {\r
 362 unsigned portLONG ulAddress;\r
 363 unsigned portCHAR ucBlock;\r
 364 \r
 365         /* Place a few bytes of known values on the bottom of the stack. \r
 366         This is just useful for debugging. */\r
 367 \r
 368         *pxTopOfStack = 0x11;\r
 369         pxTopOfStack++;\r
 370         *pxTopOfStack = 0x22;\r
 371         pxTopOfStack++;\r
 372         *pxTopOfStack = 0x33;\r
 373         pxTopOfStack++;\r
 374 \r
 375 \r
 376         /* Simulate how the stack would look after a call to vPortYield() generated\r
 377         by the compiler. \r
 378 \r
 379         First store the function parameters.  This is where the task will expect to\r
 380         find them when it starts running. */\r
 381         ulAddress = ( unsigned portLONG ) pvParameters;\r
 382         *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );\r
 383         pxTopOfStack++;\r
 384 \r
 385         ulAddress >>= 8;\r
 386         *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );\r
 387         pxTopOfStack++;\r
 388 \r
 389         /* Next we just leave a space.  When a context is saved the stack pointer\r
 390         is incremented before it is used so as not to corrupt whatever the stack\r
 391         pointer is actually pointing to.  This is especially necessary during \r
 392         function epilogue code generated by the compiler. */\r
 393         *pxTopOfStack = 0x44;\r
 394         pxTopOfStack++;\r
 395 \r
 396         /* Next are all the registers that form part of the task context. */\r
 397         \r
 398         *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */\r
 399         pxTopOfStack++;\r
 400 \r
 401         *pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */\r
 402         pxTopOfStack++;\r
 403 \r
 404         /* INTCON is saved with interrupts enabled. */\r
 405         *pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
 406         pxTopOfStack++;\r
 407 \r
 408         *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */\r
 409         pxTopOfStack++;\r
 410 \r
 411         *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */\r
 412         pxTopOfStack++;\r
 413 \r
 414         *pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */\r
 415         pxTopOfStack++;\r
 416 \r
 417         *pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */\r
 418         pxTopOfStack++;\r
 419 \r
 420         *pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */\r
 421         pxTopOfStack++;\r
 422 \r
 423         *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */\r
 424         pxTopOfStack++;\r
 425 \r
 426         *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */\r
 427         pxTopOfStack++;\r
 428 \r
 429         *pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */\r
 430         pxTopOfStack++;\r
 431 \r
 432         *pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */\r
 433         pxTopOfStack++;\r
 434 \r
 435         *pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */\r
 436         pxTopOfStack++;\r
 437 \r
 438         *pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */\r
 439         pxTopOfStack++;\r
 440 \r
 441         *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */\r
 442         pxTopOfStack++;\r
 443 \r
 444         *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */\r
 445         pxTopOfStack++;\r
 446 \r
 447         /* Next the .tmpdata and MATH_DATA sections. */\r
 448         for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )\r
 449         {\r
 450                 *pxTopOfStack = ( portSTACK_TYPE ) ucBlock;\r
 451                 *pxTopOfStack++;\r
 452         }\r
 453 \r
 454         /* Store the top of the global data section. */\r
 455         *pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
 456         pxTopOfStack++;\r
 457 \r
 458         *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */\r
 459         pxTopOfStack++;\r
 460 \r
 461         /* The only function return address so far is the address of the \r
 462         task. */\r
 463         ulAddress = ( unsigned portLONG ) pxCode;\r
 464 \r
 465         /* TOS low. */\r
 466         *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );\r
 467         pxTopOfStack++;\r
 468         ulAddress >>= 8;\r
 469 \r
 470         /* TOS high. */\r
 471         *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );\r
 472         pxTopOfStack++;\r
 473         ulAddress >>= 8;\r
 474 \r
 475         /* TOS even higher. */\r
 476         *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );\r
 477         pxTopOfStack++;\r
 478 \r
 479         /* Store the number of return addresses on the hardware stack - so far only\r
 480         the address of the task entry point. */\r
 481         *pxTopOfStack = ( portSTACK_TYPE ) 1;\r
 482         pxTopOfStack++;\r
 483 \r
 484         return pxTopOfStack;\r
 485 }\r
 486 /*-----------------------------------------------------------*/\r
 487 \r
 488 portBASE_TYPE xPortStartScheduler( void )\r
 489 {\r
 490         /* Setup a timer for the tick ISR is using the preemptive scheduler. */\r
 491         prvSetupTimerInterrupt(); \r
 492 \r
 493         /* Restore the context of the first task to run. */\r
 494         portRESTORE_CONTEXT();\r
 495 \r
 496         /* Should not get here.  Use the function name to stop compiler warnings. */\r
 497         ( void ) prvLowInterrupt;\r
 498         ( void ) prvTickISR;\r
 499 \r
 500         return pdTRUE;\r
 501 }\r
 502 /*-----------------------------------------------------------*/\r
 503 \r
 504 void vPortEndScheduler( void )\r
 505 {\r
 506         /* It is unlikely that the scheduler for the PIC port will get stopped\r
 507         once running.  If required disable the tick interrupt here, then return \r
 508         to xPortStartScheduler(). */\r
 509 }\r
 510 /*-----------------------------------------------------------*/\r
 511 \r
 512 /*\r
 513  * Manual context switch.  This is similar to the tick context switch,\r
 514  * but does not increment the tick count.  It must be identical to the\r
 515  * tick context switch in how it stores the stack of a task.\r
 516  */\r
 517 void vPortYield( void )\r
 518 {\r
 519         /* This can get called with interrupts either enabled or disabled.  We\r
 520         will save the INTCON register with the interrupt enable bits unmodified. */\r
 521         portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED );\r
 522 \r
 523         /* Switch to the highest priority task that is ready to run. */\r
 524         vTaskSwitchContext();\r
 525 \r
 526         /* Start executing the task we have just switched to. */\r
 527         portRESTORE_CONTEXT();\r
 528 }\r
 529 /*-----------------------------------------------------------*/\r
 530 \r
 531 /*\r
 532  * Vector for ISR.  Nothing here must alter any registers!\r
 533  */\r
 534 #pragma code high_vector=0x08\r
 535 static void prvLowInterrupt( void )\r
 536 {\r
 537         /* Was the interrupt the tick? */\r
 538         if( PIR1bits.CCP1IF )\r
 539         {               \r
 540                 _asm\r
 541                         goto prvTickISR\r
 542                 _endasm\r
 543         }\r
 544 \r
 545         /* Was the interrupt a byte being received? */\r
 546         if( PIR1bits.RCIF )\r
 547         {\r
 548                 _asm\r
 549                         goto vSerialRxISR\r
 550                 _endasm\r
 551         }\r
 552 \r
 553         /* Was the interrupt the Tx register becoming empty? */\r
 554         if( PIR1bits.TXIF )\r
 555         {\r
 556                 if( PIE1bits.TXIE )\r
 557                 {\r
 558                         _asm\r
 559                                 goto vSerialTxISR\r
 560                         _endasm\r
 561                 }\r
 562         }\r
 563 }\r
 564 #pragma code\r
 565 \r
 566 /*-----------------------------------------------------------*/\r
 567 \r
 568 /*\r
 569  * ISR for the tick.\r
 570  * This increments the tick count and, if using the preemptive scheduler, \r
 571  * performs a context switch.  This must be identical to the manual \r
 572  * context switch in how it stores the context of a task. \r
 573  */\r
 574 static void prvTickISR( void )\r
 575 {\r
 576         /* Interrupts must have been enabled for the ISR to fire, so we have to \r
 577         save the context with interrupts enabled. */\r
 578         portSAVE_CONTEXT( portGLOBAL_INTERRUPT_FLAG );\r
 579         PIR1bits.CCP1IF = 0;\r
 580 \r
 581         /* Maintain the tick count. */\r
 582         vTaskIncrementTick();\r
 583 \r
 584         #if configUSE_PREEMPTION == 1\r
 585         {\r
 586                 /* Switch to the highest priority task that is ready to run. */\r
 587                 vTaskSwitchContext();\r
 588         }\r
 589         #endif\r
 590 \r
 591         portRESTORE_CONTEXT();\r
 592 }\r
 593 /*-----------------------------------------------------------*/\r
 594 \r
 595 /*\r
 596  * Setup a timer for a regular tick.\r
 597  */\r
 598 static void prvSetupTimerInterrupt( void )\r
 599 {\r
 600 const unsigned portLONG ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
 601 unsigned portLONG ulCompareValue;\r
 602 unsigned portCHAR ucByte;\r
 603 \r
 604         /* Interrupts are disabled when this function is called.\r
 605 \r
 606         Setup CCP1 to provide the tick interrupt using a compare match on timer\r
 607         1.\r
 608 \r
 609         Clear the time count then setup timer. */\r
 610         TMR1H = ( unsigned portCHAR ) 0x00;\r
 611         TMR1L = ( unsigned portCHAR ) 0x00;\r
 612 \r
 613         /* Set the compare match value. */\r
 614         ulCompareValue = ulConstCompareValue;\r
 615         CCPR1L = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff );\r
 616         ulCompareValue >>= ( unsigned portLONG ) 8;\r
 617         CCPR1H = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff ); \r
 618 \r
 619         CCP1CONbits.CCP1M0 = portBIT_SET;       /*< Compare match mode. */\r
 620         CCP1CONbits.CCP1M1 = portBIT_SET;       /*< Compare match mode. */\r
 621         CCP1CONbits.CCP1M2 = portBIT_CLEAR;     /*< Compare match mode. */\r
 622         CCP1CONbits.CCP1M3 = portBIT_SET;       /*< Compare match mode. */\r
 623         PIE1bits.CCP1IE = portBIT_SET;          /*< Interrupt enable. */\r
 624 \r
 625         /* We are only going to use the global interrupt bit, so set the peripheral\r
 626         bit to true. */\r
 627         INTCONbits.GIEL = portBIT_SET;\r
 628 \r
 629         /* Provided library function for setting up the timer that will produce the\r
 630         tick. */\r
 631         OpenTimer1( T1_16BIT_RW & T1_SOURCE_INT & T1_PS_1_1 & T1_CCP1_T3_CCP2 );\r
 632 }\r
 633 \r