2 FreeRTOS.org V5.2.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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10 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 You should have received a copy of the GNU General Public License along
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16 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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17 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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19 A special exception to the GPL is included to allow you to distribute a
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20 combined work that includes FreeRTOS.org without being obliged to provide
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21 the source code for any proprietary components. See the licensing section
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22 of http://www.FreeRTOS.org for full details.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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53 Changes between V1.2.4 and V1.2.5
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55 + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
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56 interrupt flag setting. Using the two bits defined within
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57 portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
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58 before the test was performed.
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62 + Set the interrupt vector address to 0x08. Previously it was at the
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63 incorrect address for compatibility mode of 0x18.
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67 + PCLATU and PCLATH are now saved as part of the context. This allows
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68 function pointers to be used within tasks. Thanks to Javier Espeche
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69 for the enhancement.
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73 + TABLAT is now saved as part of the task context.
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77 + TBLPTRU is now initialised to zero as the MPLAB compiler expects this
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78 value and does not write to the register.
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81 /* Scheduler include files. */
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82 #include "FreeRTOS.h"
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85 /* MPLAB library include file. */
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88 /*-----------------------------------------------------------
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89 * Implementation of functions defined in portable.h for the PIC port.
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90 *----------------------------------------------------------*/
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92 /* Hardware setup for tick. */
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93 #define portTIMER_FOSC_SCALE ( ( unsigned portLONG ) 4 )
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95 /* Initial interrupt enable state for newly created tasks. This value is
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96 copied into INTCON when a task switches in for the first time. */
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97 #define portINITAL_INTERRUPT_STATE 0xc0
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99 /* Just the bit within INTCON for the global interrupt flag. */
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100 #define portGLOBAL_INTERRUPT_FLAG 0x80
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102 /* Constant used for context switch macro when we require the interrupt
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103 enable state to be unchanged when the interrupted task is switched back in. */
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104 #define portINTERRUPTS_UNCHANGED 0x00
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106 /* Some memory areas get saved as part of the task context. These memory
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107 area's get used by the compiler for temporary storage, especially when
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108 performing mathematical operations, or when using 32bit data types. This
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109 constant defines the size of memory area which must be saved. */
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110 #define portCOMPILER_MANAGED_MEMORY_SIZE ( ( unsigned portCHAR ) 0x13 )
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112 /* We require the address of the pxCurrentTCB variable, but don't want to know
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113 any details of its type. */
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114 typedef void tskTCB;
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115 extern volatile tskTCB * volatile pxCurrentTCB;
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117 /* IO port constants. */
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118 #define portBIT_SET ( ( unsigned portCHAR ) 1 )
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119 #define portBIT_CLEAR ( ( unsigned portCHAR ) 0 )
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122 * The serial port ISR's are defined in serial.c, but are called from portable
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123 * as they use the same vector as the tick ISR.
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125 void vSerialTxISR( void );
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126 void vSerialRxISR( void );
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129 * Perform hardware setup to enable ticks.
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131 static void prvSetupTimerInterrupt( void );
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134 * ISR to maintain the tick, and perform tick context switches if the
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135 * preemptive scheduler is being used.
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137 static void prvTickISR( void );
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140 * ISR placed on the low priority vector. This calls the appropriate ISR for
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141 * the actual interrupt.
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143 static void prvLowInterrupt( void );
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146 * Macro that pushes all the registers that make up the context of a task onto
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147 * the stack, then saves the new top of stack into the TCB.
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149 * If this is called from an ISR then the interrupt enable bits must have been
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150 * set for the ISR to ever get called. Therefore we want to save the INTCON
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151 * register with the enable bits forced to be set - and ucForcedInterruptFlags
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152 * must contain these bit settings. This means the interrupts will again be
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153 * enabled when the interrupted task is switched back in.
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155 * If this is called from a manual context switch (i.e. from a call to yield),
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156 * then we want to save the INTCON so it is restored with its current state,
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157 * and ucForcedInterruptFlags must be 0. This allows a yield from within
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158 * a critical section.
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160 * The compiler uses some locations at the bottom of the memory for temporary
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161 * storage during math and other computations. This is especially true if
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162 * 32bit data types are utilised (as they are by the scheduler). The .tmpdata
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163 * and MATH_DATA sections have to be stored in there entirety as part of a task
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164 * context. This macro stores from data address 0x00 to
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165 * portCOMPILER_MANAGED_MEMORY_SIZE. This is sufficient for the demo
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166 * applications but you should check the map file for your project to ensure
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167 * this is sufficient for your needs. It is not clear whether this size is
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168 * fixed for all compilations or has the potential to be program specific.
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170 #define portSAVE_CONTEXT( ucForcedInterruptFlags ) \
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173 /* Save the status and WREG registers first, as these will get modified \
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174 by the operations below. */ \
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175 MOVFF WREG, PREINC1 \
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176 MOVFF STATUS, PREINC1 \
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177 /* Save the INTCON register with the appropriate bits forced if \
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178 necessary - as described above. */ \
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179 MOVFF INTCON, WREG \
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180 IORLW ucForcedInterruptFlags \
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181 MOVFF WREG, PREINC1 \
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184 portDISABLE_INTERRUPTS(); \
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187 /* Store the necessary registers to the stack. */ \
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188 MOVFF BSR, PREINC1 \
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189 MOVFF FSR2L, PREINC1 \
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190 MOVFF FSR2H, PREINC1 \
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191 MOVFF FSR0L, PREINC1 \
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192 MOVFF FSR0H, PREINC1 \
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193 MOVFF TABLAT, PREINC1 \
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194 MOVFF TBLPTRU, PREINC1 \
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195 MOVFF TBLPTRH, PREINC1 \
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196 MOVFF TBLPTRL, PREINC1 \
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197 MOVFF PRODH, PREINC1 \
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198 MOVFF PRODL, PREINC1 \
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199 MOVFF PCLATU, PREINC1 \
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200 MOVFF PCLATH, PREINC1 \
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201 /* Store the .tempdata and MATH_DATA areas as described above. */ \
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204 MOVFF POSTINC0, PREINC1 \
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205 MOVFF POSTINC0, PREINC1 \
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206 MOVFF POSTINC0, PREINC1 \
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207 MOVFF POSTINC0, PREINC1 \
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208 MOVFF POSTINC0, PREINC1 \
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209 MOVFF POSTINC0, PREINC1 \
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210 MOVFF POSTINC0, PREINC1 \
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211 MOVFF POSTINC0, PREINC1 \
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212 MOVFF POSTINC0, PREINC1 \
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213 MOVFF POSTINC0, PREINC1 \
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214 MOVFF POSTINC0, PREINC1 \
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215 MOVFF POSTINC0, PREINC1 \
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216 MOVFF POSTINC0, PREINC1 \
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217 MOVFF POSTINC0, PREINC1 \
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218 MOVFF POSTINC0, PREINC1 \
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219 MOVFF POSTINC0, PREINC1 \
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220 MOVFF POSTINC0, PREINC1 \
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221 MOVFF POSTINC0, PREINC1 \
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222 MOVFF POSTINC0, PREINC1 \
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223 MOVFF INDF0, PREINC1 \
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224 MOVFF FSR0L, PREINC1 \
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225 MOVFF FSR0H, PREINC1 \
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226 /* Store the hardware stack pointer in a temp register before we \
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228 MOVFF STKPTR, FSR0L \
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231 /* Store each address from the hardware stack. */ \
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232 while( STKPTR > ( unsigned portCHAR ) 0 ) \
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235 MOVFF TOSL, PREINC1 \
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236 MOVFF TOSH, PREINC1 \
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237 MOVFF TOSU, PREINC1 \
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243 /* Store the number of addresses on the hardware stack (from the \
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244 temporary register). */ \
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245 MOVFF FSR0L, PREINC1 \
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246 MOVF PREINC1, 1, 0 \
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249 /* Save the new top of the software stack in the TCB. */ \
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251 MOVFF pxCurrentTCB, FSR0L \
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252 MOVFF pxCurrentTCB + 1, FSR0H \
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253 MOVFF FSR1L, POSTINC0 \
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254 MOVFF FSR1H, POSTINC0 \
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257 /*-----------------------------------------------------------*/
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260 * This is the reverse of portSAVE_CONTEXT. See portSAVE_CONTEXT for more
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263 #define portRESTORE_CONTEXT() \
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266 /* Set FSR0 to point to pxCurrentTCB->pxTopOfStack. */ \
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267 MOVFF pxCurrentTCB, FSR0L \
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268 MOVFF pxCurrentTCB + 1, FSR0H \
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270 /* De-reference FSR0 to set the address it holds into FSR1. \
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271 (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */ \
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272 MOVFF POSTINC0, FSR1L \
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273 MOVFF POSTINC0, FSR1H \
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275 /* How many return addresses are there on the hardware stack? Discard \
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276 the first byte as we are pointing to the next free space. */ \
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277 MOVFF POSTDEC1, FSR0L \
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278 MOVFF POSTDEC1, FSR0L \
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281 /* Fill the hardware stack from our software stack. */ \
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284 while( STKPTR < FSR0L ) \
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288 MOVF POSTDEC1, 0, 0 \
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290 MOVF POSTDEC1, 0, 0 \
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292 MOVF POSTDEC1, 0, 0 \
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298 /* Restore the .tmpdata and MATH_DATA memory. */ \
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299 MOVFF POSTDEC1, FSR0H \
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300 MOVFF POSTDEC1, FSR0L \
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301 MOVFF POSTDEC1, POSTDEC0 \
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302 MOVFF POSTDEC1, POSTDEC0 \
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303 MOVFF POSTDEC1, POSTDEC0 \
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304 MOVFF POSTDEC1, POSTDEC0 \
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305 MOVFF POSTDEC1, POSTDEC0 \
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306 MOVFF POSTDEC1, POSTDEC0 \
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307 MOVFF POSTDEC1, POSTDEC0 \
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308 MOVFF POSTDEC1, POSTDEC0 \
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309 MOVFF POSTDEC1, POSTDEC0 \
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310 MOVFF POSTDEC1, POSTDEC0 \
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311 MOVFF POSTDEC1, POSTDEC0 \
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312 MOVFF POSTDEC1, POSTDEC0 \
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313 MOVFF POSTDEC1, POSTDEC0 \
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314 MOVFF POSTDEC1, POSTDEC0 \
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315 MOVFF POSTDEC1, POSTDEC0 \
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316 MOVFF POSTDEC1, POSTDEC0 \
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317 MOVFF POSTDEC1, POSTDEC0 \
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318 MOVFF POSTDEC1, POSTDEC0 \
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319 MOVFF POSTDEC1, POSTDEC0 \
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320 MOVFF POSTDEC1, INDF0 \
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321 /* Restore the other registers forming the tasks context. */ \
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322 MOVFF POSTDEC1, PCLATH \
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323 MOVFF POSTDEC1, PCLATU \
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324 MOVFF POSTDEC1, PRODL \
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325 MOVFF POSTDEC1, PRODH \
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326 MOVFF POSTDEC1, TBLPTRL \
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327 MOVFF POSTDEC1, TBLPTRH \
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328 MOVFF POSTDEC1, TBLPTRU \
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329 MOVFF POSTDEC1, TABLAT \
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330 MOVFF POSTDEC1, FSR0H \
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331 MOVFF POSTDEC1, FSR0L \
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332 MOVFF POSTDEC1, FSR2H \
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333 MOVFF POSTDEC1, FSR2L \
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334 MOVFF POSTDEC1, BSR \
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335 /* The next byte is the INTCON register. Read this into WREG as some \
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336 manipulation is required. */ \
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337 MOVFF POSTDEC1, WREG \
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340 /* From the INTCON register, only the interrupt enable bits form part \
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341 of the tasks context. It is perfectly legitimate for another task to \
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342 have modified any other bits. We therefore only restore the top two bits. \
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344 if( WREG & portGLOBAL_INTERRUPT_FLAG ) \
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347 MOVFF POSTDEC1, STATUS \
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348 MOVFF POSTDEC1, WREG \
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349 /* Return enabling interrupts. */ \
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356 MOVFF POSTDEC1, STATUS \
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357 MOVFF POSTDEC1, WREG \
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358 /* Return without effecting interrupts. The context may have \
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359 been saved from a critical region. */ \
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364 /*-----------------------------------------------------------*/
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367 * See header file for description.
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369 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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371 unsigned portLONG ulAddress;
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372 unsigned portCHAR ucBlock;
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374 /* Place a few bytes of known values on the bottom of the stack.
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375 This is just useful for debugging. */
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377 *pxTopOfStack = 0x11;
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379 *pxTopOfStack = 0x22;
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381 *pxTopOfStack = 0x33;
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385 /* Simulate how the stack would look after a call to vPortYield() generated
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388 First store the function parameters. This is where the task will expect to
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389 find them when it starts running. */
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390 ulAddress = ( unsigned portLONG ) pvParameters;
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391 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
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395 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
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398 /* Next we just leave a space. When a context is saved the stack pointer
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399 is incremented before it is used so as not to corrupt whatever the stack
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400 pointer is actually pointing to. This is especially necessary during
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401 function epilogue code generated by the compiler. */
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402 *pxTopOfStack = 0x44;
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405 /* Next are all the registers that form part of the task context. */
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407 *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */
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410 *pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */
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413 /* INTCON is saved with interrupts enabled. */
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414 *pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */
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417 *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */
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420 *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */
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423 *pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */
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426 *pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */
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429 *pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */
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432 *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */
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435 *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */
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438 *pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */
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441 *pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */
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444 *pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */
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447 *pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */
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450 *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */
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453 *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */
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456 /* Next the .tmpdata and MATH_DATA sections. */
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457 for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )
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459 *pxTopOfStack = ( portSTACK_TYPE ) ucBlock;
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463 /* Store the top of the global data section. */
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464 *pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */
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467 *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */
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470 /* The only function return address so far is the address of the
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472 ulAddress = ( unsigned portLONG ) pxCode;
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475 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
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480 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
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484 /* TOS even higher. */
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485 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned portLONG ) 0x00ff );
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488 /* Store the number of return addresses on the hardware stack - so far only
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489 the address of the task entry point. */
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490 *pxTopOfStack = ( portSTACK_TYPE ) 1;
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493 return pxTopOfStack;
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495 /*-----------------------------------------------------------*/
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497 portBASE_TYPE xPortStartScheduler( void )
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499 /* Setup a timer for the tick ISR is using the preemptive scheduler. */
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500 prvSetupTimerInterrupt();
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502 /* Restore the context of the first task to run. */
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503 portRESTORE_CONTEXT();
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505 /* Should not get here. Use the function name to stop compiler warnings. */
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506 ( void ) prvLowInterrupt;
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507 ( void ) prvTickISR;
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511 /*-----------------------------------------------------------*/
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513 void vPortEndScheduler( void )
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515 /* It is unlikely that the scheduler for the PIC port will get stopped
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516 once running. If required disable the tick interrupt here, then return
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517 to xPortStartScheduler(). */
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519 /*-----------------------------------------------------------*/
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522 * Manual context switch. This is similar to the tick context switch,
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523 * but does not increment the tick count. It must be identical to the
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524 * tick context switch in how it stores the stack of a task.
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526 void vPortYield( void )
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528 /* This can get called with interrupts either enabled or disabled. We
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529 will save the INTCON register with the interrupt enable bits unmodified. */
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530 portSAVE_CONTEXT( portINTERRUPTS_UNCHANGED );
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532 /* Switch to the highest priority task that is ready to run. */
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533 vTaskSwitchContext();
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535 /* Start executing the task we have just switched to. */
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536 portRESTORE_CONTEXT();
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538 /*-----------------------------------------------------------*/
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541 * Vector for ISR. Nothing here must alter any registers!
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543 #pragma code high_vector=0x08
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544 static void prvLowInterrupt( void )
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546 /* Was the interrupt the tick? */
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547 if( PIR1bits.CCP1IF )
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554 /* Was the interrupt a byte being received? */
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555 if( PIR1bits.RCIF )
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562 /* Was the interrupt the Tx register becoming empty? */
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563 if( PIR1bits.TXIF )
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565 if( PIE1bits.TXIE )
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575 /*-----------------------------------------------------------*/
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578 * ISR for the tick.
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579 * This increments the tick count and, if using the preemptive scheduler,
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580 * performs a context switch. This must be identical to the manual
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581 * context switch in how it stores the context of a task.
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583 static void prvTickISR( void )
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585 /* Interrupts must have been enabled for the ISR to fire, so we have to
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586 save the context with interrupts enabled. */
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587 portSAVE_CONTEXT( portGLOBAL_INTERRUPT_FLAG );
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588 PIR1bits.CCP1IF = 0;
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590 /* Maintain the tick count. */
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591 vTaskIncrementTick();
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593 #if configUSE_PREEMPTION == 1
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595 /* Switch to the highest priority task that is ready to run. */
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596 vTaskSwitchContext();
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600 portRESTORE_CONTEXT();
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602 /*-----------------------------------------------------------*/
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605 * Setup a timer for a regular tick.
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607 static void prvSetupTimerInterrupt( void )
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609 const unsigned portLONG ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
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610 unsigned portLONG ulCompareValue;
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611 unsigned portCHAR ucByte;
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613 /* Interrupts are disabled when this function is called.
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615 Setup CCP1 to provide the tick interrupt using a compare match on timer
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618 Clear the time count then setup timer. */
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619 TMR1H = ( unsigned portCHAR ) 0x00;
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620 TMR1L = ( unsigned portCHAR ) 0x00;
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622 /* Set the compare match value. */
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623 ulCompareValue = ulConstCompareValue;
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624 CCPR1L = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff );
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625 ulCompareValue >>= ( unsigned portLONG ) 8;
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626 CCPR1H = ( unsigned portCHAR ) ( ulCompareValue & ( unsigned portLONG ) 0xff );
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628 CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */
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629 CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */
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630 CCP1CONbits.CCP1M2 = portBIT_CLEAR; /*< Compare match mode. */
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631 CCP1CONbits.CCP1M3 = portBIT_SET; /*< Compare match mode. */
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632 PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */
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634 /* We are only going to use the global interrupt bit, so set the peripheral
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636 INTCONbits.GIEL = portBIT_SET;
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638 /* Provided library function for setting up the timer that will produce the
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640 OpenTimer1( T1_16BIT_RW & T1_SOURCE_INT & T1_PS_1_1 & T1_CCP1_T3_CCP2 );
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projects / freertos / blob