2 FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 ***************************************************************************
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29 * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
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30 * and even write all or part of your application on your behalf. *
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31 * See http://www.OpenRTOS.com for details of the services we provide to *
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32 * expedite your project. *
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34 ***************************************************************************
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35 ***************************************************************************
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37 Please ensure to read the configuration and relevant port sections of the
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38 online documentation.
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40 http://www.FreeRTOS.org - Documentation, latest information, license and
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43 http://www.SafeRTOS.com - A version that is certified for use in safety
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46 http://www.OpenRTOS.com - Commercial support, development, porting,
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47 licensing and training services.
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50 /*-----------------------------------------------------------
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51 * Implementation of functions defined in portable.h for the PIC32MX port.
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52 *----------------------------------------------------------*/
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54 /* Scheduler include files. */
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55 #include "FreeRTOS.h"
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58 /* Hardware specifics. */
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59 #define portTIMER_PRESCALE 8
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61 /* Bits within various registers. */
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62 #define portIE_BIT ( 0x00000001 )
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63 #define portEXL_BIT ( 0x00000002 )
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64 #define portSW0_ENABLE ( 0x00000100 )
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66 /* The EXL bit is set to ensure interrupts do not occur while the context of
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67 the first task is being restored. */
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68 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portSW0_ENABLE )
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70 /* Records the interrupt nesting depth. This starts at one as it will be
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71 decremented to 0 when the first task starts. */
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72 volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;
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74 /* Stores the task stack pointer when a switch is made to use the system stack. */
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75 unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;
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77 /* The stack used by interrupt service routines that cause a context switch. */
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78 portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };
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80 /* The top of stack value ensures there is enough space to store 6 registers on
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81 the callers stack, as some functions seem to want to do this. */
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82 const portBASE_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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84 /* Place the prototype here to ensure the interrupt vector is correctly installed. */
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85 extern void __attribute__( (interrupt(ipl1), vector(_TIMER_1_VECTOR))) vT1InterruptHandler( void );
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88 * The software interrupt handler that performs the yield.
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90 void __attribute__( (interrupt(ipl1), vector(_CORE_SOFTWARE_0_VECTOR))) vPortYieldISR( void );
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92 /*-----------------------------------------------------------*/
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95 * See header file for description.
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97 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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99 *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;
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102 *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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105 *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();
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108 *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR; /* CP0_STATUS */
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111 *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */
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114 *pxTopOfStack = (portSTACK_TYPE) NULL; /* ra */
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115 pxTopOfStack -= 15;
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117 *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in */
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118 pxTopOfStack -= 14;
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120 *pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* critical nesting level - no longer used. */
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123 return pxTopOfStack;
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125 /*-----------------------------------------------------------*/
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128 * Setup a timer for a regular tick.
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130 void prvSetupTimerInterrupt( void )
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132 const unsigned portLONG ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;
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134 OpenTimer1( ( T1_ON | T1_PS_1_8 | T1_SOURCE_INT ), ulCompareMatch );
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135 ConfigIntTimer1( T1_INT_ON | configKERNEL_INTERRUPT_PRIORITY );
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137 /*-----------------------------------------------------------*/
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139 void vPortEndScheduler(void)
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141 /* It is unlikely that the scheduler for the PIC port will get stopped
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142 once running. If required disable the tick interrupt here, then return
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143 to xPortStartScheduler(). */
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146 /*-----------------------------------------------------------*/
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148 portBASE_TYPE xPortStartScheduler( void )
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150 extern void vPortStartFirstTask( void );
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151 extern void *pxCurrentTCB;
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153 /* Setup the software interrupt. */
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154 mConfigIntCoreSW0( CSW_INT_ON | CSW_INT_PRIOR_1 | CSW_INT_SUB_PRIOR_0 );
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156 /* Setup the timer to generate the tick. Interrupts will have been
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157 disabled by the time we get here. */
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158 prvSetupTimerInterrupt();
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160 /* Kick off the highest priority task that has been created so far.
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161 Its stack location is loaded into uxSavedTaskStackPointer. */
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162 uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;
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163 vPortStartFirstTask();
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165 /* Should never get here as the tasks will now be executing. */
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168 /*-----------------------------------------------------------*/
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170 void vPortIncrementTick( void )
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172 unsigned portBASE_TYPE uxSavedStatus;
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174 uxSavedStatus = uxPortSetInterruptMaskFromISR();
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175 vTaskIncrementTick();
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176 vPortClearInterruptMaskFromISR( uxSavedStatus );
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178 /* If we are using the preemptive scheduler then we might want to select
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179 a different task to execute. */
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180 #if configUSE_PREEMPTION == 1
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182 #endif /* configUSE_PREEMPTION */
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184 /* Clear timer 0 interrupt. */
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187 /*-----------------------------------------------------------*/
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189 unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )
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191 unsigned portBASE_TYPE uxSavedStatusRegister;
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193 asm volatile ( "di" );
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194 uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
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195 _CP0_SET_STATUS( ( uxSavedStatusRegister | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) );
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197 return uxSavedStatusRegister;
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199 /*-----------------------------------------------------------*/
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201 void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )
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203 _CP0_SET_STATUS( uxSavedStatusRegister );
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205 /*-----------------------------------------------------------*/
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