2 FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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54 #include <p32xxxx.h>
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55 #include <sys/asm.h>
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56 #include "ISR_Support.h"
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62 .extern pxCurrentTCB
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63 .extern vTaskSwitchContext
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64 .extern vPortIncrementTick
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65 .extern xISRStackTop
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67 .global vPortStartFirstTask
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68 .global vPortYieldISR
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69 .global vT1InterruptHandler
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72 /******************************************************************/
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74 .section .FreeRTOS, "ax", @progbits
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77 .ent vT1InterruptHandler
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79 vT1InterruptHandler:
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83 jal vPortIncrementTick
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88 .end vT1InterruptHandler
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90 /******************************************************************/
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92 .section .FreeRTOS, "ax", @progbits
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95 .ent xPortStartScheduler
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97 vPortStartFirstTask:
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99 /* Simply restore the context of the highest priority task that has been
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101 portRESTORE_CONTEXT
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103 .end xPortStartScheduler
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107 /*******************************************************************/
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109 .section .FreeRTOS, "ax", @progbits
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116 /* Make room for the context. First save the current status so we can
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117 manipulate it, and the cause and EPC registers so we capture their
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118 original values in case of interrupt nesting. */
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119 mfc0 k0, _CP0_CAUSE
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120 addiu sp, sp, -portCONTEXT_SIZE
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121 mfc0 k1, _CP0_STATUS
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123 /* Also save s6 and s5 so we can use them during this interrupt. Any
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124 nesting interrupts should maintain the values of these registers
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128 sw k1, portSTATUS_STACK_LOCATION(sp)
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130 /* Enable interrupts above the current priority. */
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135 /* s5 is used as the frame pointer. */
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138 /* Swap to the system stack. This is not conditional on the nesting
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139 count as this interrupt is always the lowest priority and therefore
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140 the nesting is always 0. */
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141 la sp, xISRStackTop
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144 /* Set the nesting count. */
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145 la k0, uxInterruptNesting
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149 /* s6 holds the EPC value, this is saved with the rest of the context
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150 after interrupts are enabled. */
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153 /* Re-enable interrupts. */
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154 mtc0 k1, _CP0_STATUS
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156 /* Save the context into the space just created. s6 is saved again
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157 here as it now contains the EPC value. */
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177 sw s6, portEPC_STACK_LOCATION(s5)
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178 /* s5 and s6 has already been saved. */
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186 /* s7 is used as a scratch register as this should always be saved across
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187 nesting interrupts. */
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193 /* Save the stack pointer to the task. */
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194 la s7, pxCurrentTCB
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198 /* Set the interrupt mask to the max priority that can use the API. The
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199 yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY which
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200 is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever
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201 raise the IPL value and never lower it. */
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203 mfc0 s7, _CP0_STATUS
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205 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
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207 /* This mtc0 re-enables interrupts, but only above
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208 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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209 mtc0 s6, _CP0_STATUS
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211 /* Clear the software interrupt in the core. */
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212 mfc0 s6, _CP0_CAUSE
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215 mtc0 s6, _CP0_CAUSE
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217 /* Clear the interrupt in the interrupt controller. */
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222 jal vTaskSwitchContext
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225 /* Clear the interrupt mask again. The saved status value is still in s7. */
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226 mtc0 s7, _CP0_STATUS
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228 /* Restore the stack pointer from the TCB. */
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229 la s0, pxCurrentTCB
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233 /* Restore the rest of the context. */
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244 /* s5 is loaded later. */
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266 /* Protect access to the k registers, and others. */
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269 /* Set nesting back to zero. As the lowest priority interrupt this
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270 interrupt cannot have nested. */
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271 la k0, uxInterruptNesting
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274 /* Switch back to use the real stack pointer. */
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277 /* Restore the real s5 value. */
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280 /* Pop the status and epc values. */
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281 lw k1, portSTATUS_STACK_LOCATION(sp)
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282 lw k0, portEPC_STACK_LOCATION(sp)
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284 /* Remove stack frame. */
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285 addiu sp, sp, portCONTEXT_SIZE
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287 mtc0 k1, _CP0_STATUS
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