2 FreeRTOS.org V5.4.0 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS.org without being obliged to provide
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11 the source code for any proprietary components. Alternative commercial
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12 license and support terms are also available upon request. See the
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13 licensing section of http://www.FreeRTOS.org for full details.
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15 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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20 You should have received a copy of the GNU General Public License along
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21 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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22 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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53 /* Standard includes. */
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56 /* Scheduler includes. */
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57 #include "FreeRTOS.h"
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60 /* Constants required to setup the initial task context. */
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61 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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62 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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63 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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64 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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66 /* Constants required to setup the tick ISR. */
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67 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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68 #define portPRESCALE_VALUE 0x00
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69 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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70 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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72 /* Constants required to setup the VIC for the tick ISR. */
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73 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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74 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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75 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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77 /* Constants required to handle interrupts. */
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78 #define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )
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79 #define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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81 /*-----------------------------------------------------------*/
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83 /* The code generated by the Keil compiler does not maintain separate
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84 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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85 use the stack as per other ports. Instead a variable is used to keep
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86 track of the critical section nesting. This variable has to be stored
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87 as part of the task context and must be initialised to a non zero value. */
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89 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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90 volatile unsigned portLONG ulCriticalNesting = 9999UL;
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92 /*-----------------------------------------------------------*/
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94 /* Setup the timer to generate the tick interrupts. */
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95 static void prvSetupTimerInterrupt( void );
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98 * The scheduler can only be started from ARM mode, so
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99 * vPortStartFirstSTask() is defined in portISR.c.
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101 extern __asm void vPortStartFirstTask( void );
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103 /*-----------------------------------------------------------*/
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106 * See header file for description.
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108 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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110 portSTACK_TYPE *pxOriginalTOS;
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112 /* Setup the initial stack of the task. The stack is set exactly as
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113 expected by the portRESTORE_CONTEXT() macro.
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115 Remember where the top of the (simulated) stack is before we place
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117 pxOriginalTOS = pxTopOfStack;
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119 /* First on the stack is the return address - which in this case is the
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120 start of the task. The offset is added to make the return address appear
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121 as it would within an IRQ ISR. */
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122 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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125 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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127 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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129 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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131 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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133 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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135 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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137 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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139 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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141 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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143 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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145 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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147 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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151 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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153 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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156 /* The last thing onto the stack is the status register, which is set for
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157 system mode, with interrupts enabled. */
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158 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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160 #ifdef KEIL_THUMB_INTERWORK
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162 /* We want the task to start in thumb mode. */
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163 *pxTopOfStack |= portTHUMB_MODE_BIT;
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169 /* The code generated by the Keil compiler does not maintain separate
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170 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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171 use the stack as per other ports. Instead a variable is used to keep
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172 track of the critical section nesting. This variable has to be stored
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173 as part of the task context and is initially set to zero. */
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174 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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176 return pxTopOfStack;
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178 /*-----------------------------------------------------------*/
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180 portBASE_TYPE xPortStartScheduler( void )
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182 /* Start the timer that generates the tick ISR. */
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183 prvSetupTimerInterrupt();
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185 /* Start the first task. This is done from portISR.c as ARM mode must be
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187 vPortStartFirstTask();
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189 /* Should not get here! */
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192 /*-----------------------------------------------------------*/
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194 void vPortEndScheduler( void )
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196 /* It is unlikely that the ARM port will require this function as there
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197 is nothing to return to. If this is required - stop the tick ISR then
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198 return back to main. */
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200 /*-----------------------------------------------------------*/
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202 #if configUSE_PREEMPTION == 0
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205 * The cooperative scheduler requires a normal IRQ service routine to
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206 * simply increment the system tick.
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208 void vNonPreemptiveTick( void ) __irq;
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209 void vNonPreemptiveTick( void ) __irq
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211 /* Increment the tick count - this may make a delaying task ready
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212 to run - but a context switch is not performed. */
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213 vTaskIncrementTick();
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215 T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */
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216 VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */
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222 **************************************************************************
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223 * The preemptive scheduler ISR is written in assembler and can be found
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224 * in the portASM.s file. This will only get used if portUSE_PREEMPTION
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225 * is set to 1 in portmacro.h
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226 **************************************************************************
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229 void vPreemptiveTick( void );
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232 /*-----------------------------------------------------------*/
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234 static void prvSetupTimerInterrupt( void )
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236 unsigned portLONG ulCompareMatch;
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238 /* A 1ms tick does not require the use of the timer prescale. This is
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239 defaulted to zero but can be used if necessary. */
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240 T0PR = portPRESCALE_VALUE;
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242 /* Calculate the match value required for our wanted tick rate. */
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243 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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245 /* Protect against divide by zero. Using an if() statement still results
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246 in a warning - hence the #if. */
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247 #if portPRESCALE_VALUE != 0
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249 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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253 T0MR0 = ulCompareMatch;
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255 /* Generate tick with timer 0 compare match. */
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256 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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258 /* Setup the VIC for the timer. */
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259 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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260 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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262 /* The ISR installed depends on whether the preemptive or cooperative
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263 scheduler is being used. */
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264 #if configUSE_PREEMPTION == 1
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266 VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;
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270 VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;
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274 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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276 /* Start the timer - interrupts are disabled when this function is called
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277 so it is okay to do this here. */
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278 T0TCR = portENABLE_TIMER;
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280 /*-----------------------------------------------------------*/
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282 void vPortEnterCritical( void )
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284 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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287 /* Now interrupts are disabled ulCriticalNesting can be accessed
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288 directly. Increment ulCriticalNesting to keep a count of how many times
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289 portENTER_CRITICAL() has been called. */
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290 ulCriticalNesting++;
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292 /*-----------------------------------------------------------*/
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294 void vPortExitCritical( void )
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296 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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298 /* Decrement the nesting count as we are leaving a critical section. */
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299 ulCriticalNesting--;
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301 /* If the nesting level has reached zero then interrupts should be
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303 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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305 /* Enable interrupts as per portEXIT_CRITICAL(). */
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310 /*-----------------------------------------------------------*/
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