2 FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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28 Please ensure to read the configuration and relevant port sections of the
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29 online documentation.
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31 +++ http://www.FreeRTOS.org +++
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32 Documentation, latest information, license and contact details.
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34 +++ http://www.SafeRTOS.com +++
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35 A version that is certified for use in safety critical systems.
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37 +++ http://www.OpenRTOS.com +++
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38 Commercial support, development, porting, licensing and training services.
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40 ***************************************************************************
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43 #include "FreeRTOS.h"
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45 #include "mb96348hs.h"
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47 /*-----------------------------------------------------------
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48 * Implementation of functions defined in portable.h for the 16FX port.
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49 *----------------------------------------------------------*/
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52 * Get current value of DPR and ADB registers
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54 portSTACK_TYPE xGet_DPR_ADB_bank( void );
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57 * Get current value of DTB and PCB registers
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59 portSTACK_TYPE xGet_DTB_PCB_bank( void );
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62 * Sets up the periodic ISR used for the RTOS tick. This uses RLT0, but
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63 * can be done using any given RLT.
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65 static void prvSetupRLT0Interrupt( void );
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67 /*-----------------------------------------------------------*/
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70 * We require the address of the pxCurrentTCB variable, but don't want to know
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71 * any details of its type.
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73 typedef void tskTCB;
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74 extern volatile tskTCB * volatile pxCurrentTCB;
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76 /* Constants required to handle critical sections. */
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77 #define portNO_CRITICAL_NESTING ( ( unsigned portBASE_TYPE ) 0 )
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78 volatile unsigned portBASE_TYPE uxCriticalNesting = 9999UL;
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80 /*-----------------------------------------------------------*/
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83 * Macro to save a task context to the task stack. This macro copies the
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84 * saved context (AH:AL, DPR:ADB, DTB:PCB , PC and PS) from the system
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85 * stack to task stack pointed by user stack pointer ( USP for SMALL and
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86 * MEDIUM memory model amd USB:USP for COMPACT and LARGE memory model ),
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87 * then it pushes the general purpose registers RW0-RW7 on to the task
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88 * stack. Finally the resultant stack pointer value is saved into the
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89 * task control block so it can be retrieved the next time the task
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92 #if( ( configMEMMODEL == portSMALL ) || ( configMEMMODEL == portMEDIUM ) )
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94 #define portSAVE_CONTEXT() \
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95 { __asm(" POPW A "); \
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96 __asm(" AND CCR,#H'DF "); \
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97 __asm(" PUSHW A "); \
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98 __asm(" OR CCR,#H'20 "); \
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99 __asm(" POPW A "); \
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100 __asm(" AND CCR,#H'DF "); \
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101 __asm(" PUSHW A "); \
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102 __asm(" OR CCR,#H'20 "); \
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103 __asm(" POPW A "); \
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104 __asm(" AND CCR,#H'DF "); \
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105 __asm(" PUSHW A "); \
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106 __asm(" OR CCR,#H'20 "); \
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107 __asm(" POPW A "); \
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108 __asm(" AND CCR,#H'DF "); \
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109 __asm(" PUSHW A "); \
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110 __asm(" OR CCR,#H'20 "); \
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111 __asm(" POPW A "); \
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112 __asm(" AND CCR,#H'DF "); \
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113 __asm(" PUSHW A "); \
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114 __asm(" OR CCR,#H'20 "); \
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115 __asm(" POPW A "); \
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116 __asm(" AND CCR,#H'DF "); \
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117 __asm(" PUSHW A "); \
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118 __asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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120 /* Save the critical nesting count to the stack. */ \
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121 __asm(" MOVW RW0, _uxCriticalNesting "); \
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122 __asm(" PUSHW (RW0) "); \
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124 __asm(" MOVW A, _pxCurrentTCB "); \
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125 __asm(" MOVW A, SP "); \
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126 __asm(" SWAPW "); \
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127 __asm(" MOVW @AL, AH "); \
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128 __asm(" OR CCR,#H'20 "); \
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132 * Macro to restore a task context from the task stack. This is effecti-
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133 * vely the reverse of SAVE_CONTEXT(). First the stack pointer value
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134 * (USP for SMALL and MEDIUM memory model amd USB:USP for COMPACT and
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135 * LARGE memory model ) is loaded from the task control block. Next the
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136 * value of all the general purpose registers RW0-RW7 is retrieved. Fina-
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137 * lly it copies of the context ( AH:AL, DPR:ADB, DTB:PCB, PC and PS) of
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138 * the task to be executed upon RETI from user stack to system stack.
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141 #define portRESTORE_CONTEXT() \
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142 { __asm(" MOVW A, _pxCurrentTCB "); \
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143 __asm(" MOVW A, @A "); \
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144 __asm(" AND CCR,#H'DF "); \
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145 __asm(" MOVW SP, A "); \
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147 /* Load the saved uxCriticalNesting value into RW0. */ \
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148 __asm(" POPW (RW0) "); \
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150 /* Save the loaded value into the uxCriticalNesting variable. */ \
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151 __asm(" MOVW _uxCriticalNesting, RW0 "); \
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153 __asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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154 __asm(" POPW A "); \
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155 __asm(" OR CCR,#H'20 "); \
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156 __asm(" PUSHW A "); \
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157 __asm(" AND CCR,#H'DF "); \
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158 __asm(" POPW A "); \
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159 __asm(" OR CCR,#H'20 "); \
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160 __asm(" PUSHW A "); \
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161 __asm(" AND CCR,#H'DF "); \
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162 __asm(" POPW A "); \
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163 __asm(" OR CCR,#H'20 "); \
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164 __asm(" PUSHW A "); \
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165 __asm(" AND CCR,#H'DF "); \
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166 __asm(" POPW A "); \
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167 __asm(" OR CCR,#H'20 "); \
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168 __asm(" PUSHW A "); \
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169 __asm(" AND CCR,#H'DF "); \
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170 __asm(" POPW A "); \
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171 __asm(" OR CCR,#H'20 "); \
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172 __asm(" PUSHW A "); \
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173 __asm(" AND CCR,#H'DF "); \
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174 __asm(" POPW A "); \
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175 __asm(" OR CCR,#H'20 "); \
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176 __asm(" PUSHW A "); \
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179 #elif( ( configMEMMODEL == portCOMPACT ) || ( configMEMMODEL == portLARGE ) )
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181 #define portSAVE_CONTEXT() \
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182 { __asm(" POPW A "); \
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183 __asm(" AND CCR,#H'DF "); \
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184 __asm(" PUSHW A "); \
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185 __asm(" OR CCR,#H'20 "); \
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186 __asm(" POPW A "); \
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187 __asm(" AND CCR,#H'DF "); \
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188 __asm(" PUSHW A "); \
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189 __asm(" OR CCR,#H'20 "); \
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190 __asm(" POPW A "); \
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191 __asm(" AND CCR,#H'DF "); \
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192 __asm(" PUSHW A "); \
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193 __asm(" OR CCR,#H'20 "); \
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194 __asm(" POPW A "); \
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195 __asm(" AND CCR,#H'DF "); \
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196 __asm(" PUSHW A "); \
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197 __asm(" OR CCR,#H'20 "); \
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198 __asm(" POPW A "); \
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199 __asm(" AND CCR,#H'DF "); \
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200 __asm(" PUSHW A "); \
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201 __asm(" OR CCR,#H'20 "); \
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202 __asm(" POPW A "); \
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203 __asm(" AND CCR,#H'DF "); \
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204 __asm(" PUSHW A "); \
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205 __asm(" PUSHW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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207 /* Save the critical nesting count to the stack. */ \
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208 __asm(" MOVW RW0, _uxCriticalNesting "); \
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209 __asm(" PUSHW (RW0) "); \
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211 __asm(" MOVL A, _pxCurrentTCB "); \
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212 __asm(" MOVL RL2, A "); \
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213 __asm(" MOVW A, SP "); \
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214 __asm(" MOVW @RL2+0, A "); \
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215 __asm(" MOV A, USB "); \
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216 __asm(" MOV @RL2+2, A "); \
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219 #define portRESTORE_CONTEXT() \
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220 { __asm(" MOVL A, _pxCurrentTCB "); \
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221 __asm(" MOVL RL2, A "); \
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222 __asm(" MOVW A, @RL2+0 "); \
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223 __asm(" AND CCR,#H'DF "); \
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224 __asm(" MOVW SP, A "); \
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225 __asm(" MOV A, @RL2+2 "); \
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226 __asm(" MOV USB, A "); \
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228 /* Load the saved uxCriticalNesting value into RW0. */ \
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229 __asm(" POPW (RW0) "); \
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231 /* Save the loaded value into the uxCriticalNesting variable. */ \
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232 __asm(" MOVW _uxCriticalNesting, RW0 "); \
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234 __asm(" POPW (RW0,RW1,RW2,RW3,RW4,RW5,RW6,RW7) "); \
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235 __asm(" POPW A "); \
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236 __asm(" OR CCR,#H'20 "); \
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237 __asm(" PUSHW A "); \
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238 __asm(" AND CCR,#H'DF "); \
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239 __asm(" POPW A "); \
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240 __asm(" OR CCR,#H'20 "); \
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241 __asm(" PUSHW A "); \
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242 __asm(" AND CCR,#H'DF "); \
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243 __asm(" POPW A "); \
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244 __asm(" OR CCR,#H'20 "); \
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245 __asm(" PUSHW A "); \
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246 __asm(" AND CCR,#H'DF "); \
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247 __asm(" POPW A "); \
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248 __asm(" OR CCR,#H'20 "); \
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249 __asm(" PUSHW A "); \
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250 __asm(" AND CCR,#H'DF "); \
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251 __asm(" POPW A "); \
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252 __asm(" OR CCR,#H'20 "); \
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253 __asm(" PUSHW A "); \
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254 __asm(" AND CCR,#H'DF "); \
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255 __asm(" POPW A "); \
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256 __asm(" OR CCR,#H'20 "); \
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257 __asm(" PUSHW A "); \
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261 /*-----------------------------------------------------------*/
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264 * Functions for obtaining the current value of DPR:ADB, DTB:PCB bank registers
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269 .GLOBAL _xGet_DPR_ADB_bank
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270 .GLOBAL _xGet_DTB_PCB_bank
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271 .SECTION CODE, CODE, ALIGN=1
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273 _xGet_DPR_ADB_bank:
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279 #if configMEMMODEL == portMEDIUM || configMEMMODEL == portLARGE
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281 #elif configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
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286 _xGet_DTB_PCB_bank:
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292 #if configMEMMODEL == portMEDIUM || configMEMMODEL == portLARGE
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294 #elif configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
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299 /*-----------------------------------------------------------*/
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302 * Initialise the stack of a task to look exactly as if a call to
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303 * portSAVE_CONTEXT had been called.
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305 * See the header file portable.h.
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307 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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309 /* Place a few bytes of known values on the bottom of the stack.
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310 This is just useful for debugging. */
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311 *pxTopOfStack = 0x1111;
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313 *pxTopOfStack = 0x2222;
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315 *pxTopOfStack = 0x3333;
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318 /* Once the task is called the task would push the pointer to the
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319 parameter onto the stack. Hence here the pointer would be copied to the stack
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320 first. When using the COMPACT or LARGE memory model the pointer would be 24
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321 bits, and when using the SMALL or MEDIUM memory model the pointer would be 16
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323 #if( ( configMEMMODEL == portCOMPACT ) || ( configMEMMODEL == portLARGE ) )
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325 *pxTopOfStack = ( portSTACK_TYPE ) ( ( unsigned portLONG ) ( pvParameters ) >> 16 );
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330 *pxTopOfStack = ( portSTACK_TYPE ) ( pvParameters );
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333 /* This is redundant push to the stack. This is required in order to introduce
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334 an offset so that the task accesses a parameter correctly that is passed on to
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336 #if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )
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338 *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( portLONG ) ( pxCode ) >> 16 ) & 0xff );
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343 /* This is redundant push to the stack. This is required in order to introduce
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344 an offset so the task correctly accesses the parameter passed on the task stack. */
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345 *pxTopOfStack = ( portSTACK_TYPE ) ( pxCode );
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348 /* PS - User Mode, ILM=7, RB=0, Interrupts enabled,USP */
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349 *pxTopOfStack = 0xE0C0;
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353 *pxTopOfStack = ( portSTACK_TYPE ) ( pxCode );
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357 #if configMEMMODEL == portSMALL || configMEMMODEL == portCOMPACT
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359 *pxTopOfStack = xGet_DTB_PCB_bank();
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364 /* DTB | PCB, in case of MEDIUM and LARGE memory models, PCB would be used
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365 along with PC to indicate the start address of the function. */
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366 #if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )
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368 *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( portLONG ) ( pxCode ) >> 16 ) & 0xff );
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374 *pxTopOfStack = xGet_DPR_ADB_bank();
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378 *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;
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382 *pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA;
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385 /* Next the general purpose registers. */
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386 *pxTopOfStack = ( portSTACK_TYPE ) 0x7777; /* RW7 */
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388 *pxTopOfStack = ( portSTACK_TYPE ) 0x6666; /* RW6 */
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390 *pxTopOfStack = ( portSTACK_TYPE ) 0x5555; /* RW5 */
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392 *pxTopOfStack = ( portSTACK_TYPE ) 0x4444; /* RW4 */
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394 *pxTopOfStack = ( portSTACK_TYPE ) 0x3333; /* RW3 */
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396 *pxTopOfStack = ( portSTACK_TYPE ) 0x2222; /* RW2 */
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398 *pxTopOfStack = ( portSTACK_TYPE ) 0x1111; /* RW1 */
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400 *pxTopOfStack = ( portSTACK_TYPE ) 0x8888; /* RW0 */
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403 /* The task starts with its uxCriticalNesting variable set to 0, interrupts
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405 *pxTopOfStack = portNO_CRITICAL_NESTING;
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407 return pxTopOfStack;
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409 /*-----------------------------------------------------------*/
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411 static void prvSetupRLT0Interrupt( void )
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413 /* The peripheral clock divided by 16 is used by the timer. */
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414 const unsigned portSHORT usReloadValue = ( unsigned portSHORT ) ( ( ( configCLKP1_CLOCK_HZ / configTICK_RATE_HZ ) / 16UL ) - 1UL );
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416 /* set reload value = 34999+1, TICK Interrupt after 10 ms @ 56MHz of CLKP1 */
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417 TMRLR0 = usReloadValue;
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419 /* prescaler 1:16, reload, interrupt enable, count enable, trigger */
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422 /*-----------------------------------------------------------*/
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424 portBASE_TYPE xPortStartScheduler( void )
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426 /* Setup the hardware to generate the tick. */
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427 prvSetupRLT0Interrupt();
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429 /* Restore the context of the first task that is going to run. */
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430 portRESTORE_CONTEXT();
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432 /* Simulate a function call end as generated by the compiler. We will now
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433 jump to the start of the task the context of which we have just restored. */
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437 /* Should not get here. */
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440 /*-----------------------------------------------------------*/
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442 void vPortEndScheduler( void )
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444 /* Not implemented - unlikely to ever be required as there is nothing to
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448 /*-----------------------------------------------------------*/
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451 * The interrupt service routine used depends on whether the pre-emptive
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452 * scheduler is being used or not.
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455 #if configUSE_PREEMPTION == 1
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458 * Tick ISR for preemptive scheduler. We can use a __nosavereg attribute
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459 * as the context is to be saved by the portSAVE_CONTEXT() macro, not the
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460 * compiler generated code. The tick count is incremented after the context
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463 __nosavereg __interrupt void prvRLT0_TICKISR( void )
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465 /* Disable interrupts so that portSAVE_CONTEXT() is not interrupted */
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468 /* Save the context of the interrupted task. */
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469 portSAVE_CONTEXT();
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471 /* Enable interrupts */
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474 /* Clear RLT0 interrupt flag */
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477 /* Increment the tick count then switch to the highest priority task
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478 that is ready to run. */
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479 vTaskIncrementTick();
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480 vTaskSwitchContext();
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482 /* Disable interrupts so that portRESTORE_CONTEXT() is not interrupted */
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485 /* Restore the context of the new task. */
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486 portRESTORE_CONTEXT();
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488 /* Enable interrupts */
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495 * Tick ISR for the cooperative scheduler. All this does is increment the
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496 * tick count. We don't need to switch context, this can only be done by
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497 * manual calls to taskYIELD();
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499 __interrupt void prvRLT0_TICKISR( void )
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501 /* Clear RLT0 interrupt flag */
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504 vTaskIncrementTick();
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509 /*-----------------------------------------------------------*/
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512 * Manual context switch. We can use a __nosavereg attribute as the context
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513 * is to be saved by the portSAVE_CONTEXT() macro, not the compiler generated
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516 __nosavereg __interrupt void vPortYield( void )
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518 /* Save the context of the interrupted task. */
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519 portSAVE_CONTEXT();
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521 /* Switch to the highest priority task that is ready to run. */
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522 vTaskSwitchContext();
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524 /* Restore the context of the new task. */
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525 portRESTORE_CONTEXT();
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527 /*-----------------------------------------------------------*/
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529 __nosavereg __interrupt void vPortYieldDelayed( void )
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531 /* Disable interrupts so that portSAVE_CONTEXT() is not interrupted */
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534 /* Save the context of the interrupted task. */
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535 portSAVE_CONTEXT();
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537 /* Enable interrupts */
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540 /* Clear delayed interrupt flag */
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541 __asm (" CLRB 03A4H:0 ");
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543 /* Switch to the highest priority task that is ready to run. */
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544 vTaskSwitchContext();
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546 /* Disable interrupts so that portSAVE_CONTEXT() is not interrupted */
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549 /* Restore the context of the new task. */
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550 portRESTORE_CONTEXT();
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552 /* Enable interrupts */
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555 /*-----------------------------------------------------------*/
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557 void vPortEnterCritical( void )
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559 /* Disable interrupts */
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560 portDISABLE_INTERRUPTS();
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562 /* Now interrupts are disabled uxCriticalNesting can be accessed
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563 directly. Increment uxCriticalNesting to keep a count of how many times
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564 portENTER_CRITICAL() has been called. */
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565 uxCriticalNesting++;
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567 /*-----------------------------------------------------------*/
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569 void vPortExitCritical( void )
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571 if( uxCriticalNesting > portNO_CRITICAL_NESTING )
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573 uxCriticalNesting--;
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574 if( uxCriticalNesting == portNO_CRITICAL_NESTING )
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576 /* Enable all interrupt/exception. */
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577 portENABLE_INTERRUPTS();
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581 /*-----------------------------------------------------------*/
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