2 * armboot - Startup Code for ARM720 CPU-core
4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
7 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm-offsets.h>
13 #include <asm/hardware.h>
16 *************************************************************************
18 * Jump vector table as in table 3.1 in [1]
20 *************************************************************************
26 ldr pc, _undefined_instruction
27 ldr pc, _software_interrupt
28 ldr pc, _prefetch_abort
34 #ifdef CONFIG_SPL_BUILD
35 _undefined_instruction: .word _undefined_instruction
36 _software_interrupt: .word _software_interrupt
37 _prefetch_abort: .word _prefetch_abort
38 _data_abort: .word _data_abort
39 _not_used: .word _not_used
42 _pad: .word 0x12345678 /* now 16*4=64 */
44 _undefined_instruction: .word undefined_instruction
45 _software_interrupt: .word software_interrupt
46 _prefetch_abort: .word prefetch_abort
47 _data_abort: .word data_abort
48 _not_used: .word not_used
51 _pad: .word 0x12345678 /* now 16*4=64 */
52 #endif /* CONFIG_SPL_BUILD */
54 .balignl 16,0xdeadbeef
58 *************************************************************************
60 * Startup Code (reset vector)
62 * do important init only if we don't start from RAM!
63 * relocate armboot to ram
65 * jump to second stage
67 *************************************************************************
71 /* IRQ stack memory (calculated at run-time) */
72 .globl IRQ_STACK_START
76 /* IRQ stack memory (calculated at run-time) */
77 .globl FIQ_STACK_START
82 /* IRQ stack memory (calculated at run-time) + 8 bytes */
83 .globl IRQ_STACK_START_IN
88 * the actual reset code
93 * set the cpu to SVC32 mode
101 * we do sys-critical inits only at reboot,
102 * not when booting from ram!
104 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
110 /*------------------------------------------------------------------------------*/
112 .globl c_runtime_cpu_setup
118 *************************************************************************
120 * CPU_init_critical registers
122 * setup important registers
123 * setup memory timing
125 *************************************************************************
128 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
133 * before relocating, we have to setup RAM timing
134 * because memory timing is board-dependent, you will
135 * find a lowlevel_init.S in your board directory.
141 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
144 #ifndef CONFIG_SPL_BUILD
146 *************************************************************************
150 *************************************************************************
156 #define S_FRAME_SIZE 72
178 #define MODE_SVC 0x13
182 * use bad_save_user_regs for abort/prefetch/undef/swi ...
183 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
186 .macro bad_save_user_regs
187 sub sp, sp, #S_FRAME_SIZE
188 stmia sp, {r0 - r12} @ Calling r0-r12
191 ldr r2, IRQ_STACK_START_IN
192 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
193 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
197 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
201 .macro irq_save_user_regs
202 sub sp, sp, #S_FRAME_SIZE
203 stmia sp, {r0 - r12} @ Calling r0-r12
205 stmdb r8, {sp, lr}^ @ Calling SP, LR
206 str lr, [r8, #0] @ Save calling PC
208 str r6, [r8, #4] @ Save CPSR
209 str r0, [r8, #8] @ Save OLD_R0
213 .macro irq_restore_user_regs
214 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
216 ldr lr, [sp, #S_PC] @ Get PC
217 add sp, sp, #S_FRAME_SIZE
218 subs pc, lr, #4 @ return & move spsr_svc into cpsr
222 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
224 str lr, [r13] @ save caller lr / spsr
228 mov r13, #MODE_SVC @ prepare SVC-Mode
234 .macro get_irq_stack @ setup IRQ stack
235 ldr sp, IRQ_STACK_START
238 .macro get_fiq_stack @ setup FIQ stack
239 ldr sp, FIQ_STACK_START
246 undefined_instruction:
249 bl do_undefined_instruction
255 bl do_software_interrupt
275 #ifdef CONFIG_USE_IRQ
282 irq_restore_user_regs
287 /* someone ought to write a more effiction fiq_save_user_regs */
290 irq_restore_user_regs
307 #endif /* CONFIG_SPL_BUILD */