2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
38 *************************************************************************
42 *************************************************************************
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
56 _undefined_instruction:
57 .word undefined_instruction
59 .word software_interrupt
71 .balignl 16,0xdeadbeef
74 *************************************************************************
76 * Startup Code (reset vector)
78 * do important init only if we don't start from memory!
79 * setup memory and board specific bits prior to relocation.
80 * relocate armboot to ram
83 *************************************************************************
88 .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
91 * These are defined in the board-specific linker script.
92 * Subtracting _start from them lets the linker put their
93 * relative position in the executable instead of leaving
98 .word __bss_start - _start
104 #ifdef CONFIG_USE_IRQ
105 /* IRQ stack memory (calculated at run-time) */
106 .globl IRQ_STACK_START
110 /* IRQ stack memory (calculated at run-time) */
111 .globl FIQ_STACK_START
116 /* IRQ stack memory (calculated at run-time) + 8 bytes */
117 .globl IRQ_STACK_START_IN
122 * the actual reset code
127 * set the cpu to SVC32 mode
135 * we do sys-critical inits only at reboot,
136 * not when booting from ram!
138 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
142 /* Set stackpointer in internal RAM to call board_init_f */
144 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
145 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
149 /*------------------------------------------------------------------------------*/
152 * void relocate_code (addr_sp, gd, addr_moni)
154 * This "function" does not return, instead it continues in RAM
155 * after relocating the monitor code.
160 mov r4, r0 /* save addr_sp */
161 mov r5, r1 /* save addr of gd */
162 mov r6, r2 /* save addr of destination */
163 mov r7, r2 /* save addr of destination */
165 /* Set up the stack */
171 ldr r3, _bss_start_ofs
172 add r2, r0, r3 /* r2 <- source end address */
177 ldmia r0!, {r9-r10} /* copy from source address [r0] */
178 stmia r6!, {r9-r10} /* copy to target address [r1] */
179 cmp r0, r2 /* until source end address [r2] */
182 #ifndef CONFIG_PRELOADER
184 * fix .rel.dyn relocations
186 ldr r0, _TEXT_BASE /* r0 <- Text base */
187 sub r9, r7, r0 /* r9 <- relocation offset */
188 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
189 add r10, r10, r0 /* r10 <- sym table in FLASH */
190 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
191 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
192 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
193 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
195 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
196 add r0, r0, r9 /* r0 <- location to fix up in RAM */
199 cmp r8, #23 /* relative fixup? */
201 cmp r8, #2 /* absolute fixup? */
203 /* ignore unknown type of fixup */
206 /* absolute fix: set location to (offset) symbol value */
207 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
208 add r1, r10, r1 /* r1 <- address of symbol in table */
209 ldr r1, [r1, #4] /* r1 <- symbol value */
210 add r1, r9 /* r1 <- relocated sym addr */
213 /* relative fix: increase location by offset */
218 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
224 #ifndef CONFIG_PRELOADER
225 ldr r0, _bss_start_ofs
227 ldr r3, _TEXT_BASE /* Text base */
228 mov r4, r7 /* reloc addr */
231 mov r2, #0x00000000 /* clear */
233 clbss_l:str r2, [r0] /* clear loop... */
243 * We are done. Do not return, instead branch to second part of board
244 * initialization, now running from RAM.
246 #ifdef CONFIG_NAND_SPL
247 ldr r0, _nand_boot_ofs
253 ldr r0, _board_init_r_ofs
257 /* setup parameters for board_init_r */
258 mov r0, r5 /* gd_t */
259 mov r1, r7 /* dest_addr */
264 .word board_init_r - _start
268 .word __rel_dyn_start - _start
270 .word __rel_dyn_end - _start
272 .word __dynsym_start - _start
275 *************************************************************************
277 * CPU_init_critical registers
279 * setup important registers
280 * setup memory timing
282 *************************************************************************
285 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
287 /* arm_int_generic assumes the ARM boot monitor, or user software,
288 * has initialized the platform
290 mov pc, lr /* back to my caller */
293 *************************************************************************
297 *************************************************************************
303 #define S_FRAME_SIZE 72
325 #define MODE_SVC 0x13
329 * use bad_save_user_regs for abort/prefetch/undef/swi ...
330 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
333 .macro bad_save_user_regs
334 @ carve out a frame on current user stack
335 sub sp, sp, #S_FRAME_SIZE
336 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
338 ldr r2, IRQ_STACK_START_IN
339 @ get values for "aborted" pc and cpsr (into parm regs)
341 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
344 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
345 mov r0, sp @ save current stack into r0 (param register)
348 .macro irq_save_user_regs
349 sub sp, sp, #S_FRAME_SIZE
350 stmia sp, {r0 - r12} @ Calling r0-r12
351 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
353 stmdb r8, {sp, lr}^ @ Calling SP, LR
354 str lr, [r8, #0] @ Save calling PC
356 str r6, [r8, #4] @ Save CPSR
357 str r0, [r8, #8] @ Save OLD_R0
361 .macro irq_restore_user_regs
362 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
364 ldr lr, [sp, #S_PC] @ Get PC
365 add sp, sp, #S_FRAME_SIZE
366 subs pc, lr, #4 @ return & move spsr_svc into cpsr
370 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
372 str lr, [r13] @ save caller lr in position 0 of saved stack
373 mrs lr, spsr @ get the spsr
374 str lr, [r13, #4] @ save spsr in position 1 of saved stack
375 mov r13, #MODE_SVC @ prepare SVC-Mode
377 msr spsr, r13 @ switch modes, make sure moves will execute
378 mov lr, pc @ capture return pc
379 movs pc, lr @ jump to next instruction & switch modes.
382 .macro get_irq_stack @ setup IRQ stack
383 ldr sp, IRQ_STACK_START
386 .macro get_fiq_stack @ setup FIQ stack
387 ldr sp, FIQ_STACK_START
394 .globl undefined_instruction
395 undefined_instruction:
398 bl do_undefined_instruction
401 .globl software_interrupt
405 bl do_software_interrupt
408 .globl prefetch_abort
428 #ifdef CONFIG_USE_IRQ
435 irq_restore_user_regs
441 /* someone ought to write a more effiction fiq_save_user_regs */
444 irq_restore_user_regs