4 * Common bootmode functions for omap based boards
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/omap_common.h>
14 #include <asm/arch/omap.h>
15 #include <asm/arch/mmc_host_def.h>
16 #include <asm/arch/sys_proto.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 void save_omap_boot_params(void)
23 u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
25 u32 dev_desc, dev_data;
27 if ((rom_params < NON_SECURE_SRAM_START) ||
28 (rom_params > NON_SECURE_SRAM_END))
32 * rom_params can be type casted to omap_boot_parameters and
33 * used. But it not correct to assume that romcode structure
34 * encoding would be same as u-boot. So use the defined offsets.
36 boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
38 #if defined(BOOT_DEVICE_NAND_I2C)
40 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
41 * Otherwise the SPL boot IF can't handle this device correctly.
42 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
43 * Draco leads to this boot-device passed to SPL from the BootROM.
45 if (boot_device == BOOT_DEVICE_NAND_I2C)
46 boot_device = BOOT_DEVICE_NAND;
48 gd->arch.omap_boot_params.omap_bootdevice = boot_device;
50 gd->arch.omap_boot_params.ch_flags =
51 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
53 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
54 (boot_device <= MMC_BOOT_DEVICES_END)) {
55 #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
56 !defined(CONFIG_AM43XX)
57 if ((omap_hw_init_context() ==
58 OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
59 gd->arch.omap_boot_params.omap_bootmode =
60 *((u8 *)(rom_params + BOOT_MODE_OFFSET));
64 dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
65 dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
66 gd->arch.omap_boot_params.omap_bootmode =
67 *((u32 *)(dev_data + BOOT_MODE_OFFSET));
71 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
73 * We get different values for QSPI_1 and QSPI_4 being used, but
74 * don't actually care about this difference. Rather than
75 * mangle the later code, if we're coming in as QSPI_4 just
76 * change to the QSPI_1 value.
78 if (gd->arch.omap_boot_params.omap_bootdevice == 11)
79 gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
83 #ifdef CONFIG_SPL_BUILD
84 u32 spl_boot_device(void)
86 return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
89 u32 spl_boot_mode(void)
91 u32 val = gd->arch.omap_boot_params.omap_bootmode;
93 if (val == MMCSD_MODE_RAW)
94 return MMCSD_MODE_RAW;
95 else if (val == MMCSD_MODE_FS)
98 #ifdef CONFIG_SUPPORT_EMMC_BOOT
99 return MMCSD_MODE_EMMCBOOT;
101 return MMCSD_MODE_UNDEFINED;
105 void spl_board_init(void)
107 #ifdef CONFIG_SPL_NAND_SUPPORT
110 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
113 #if defined(CONFIG_HW_WATCHDOG)
117 am33xx_spl_board_init();
121 int board_mmc_init(bd_t *bis)
123 switch (spl_boot_device()) {
124 case BOOT_DEVICE_MMC1:
125 omap_mmc_init(0, 0, 0, -1, -1);
127 case BOOT_DEVICE_MMC2:
128 case BOOT_DEVICE_MMC2_2:
129 omap_mmc_init(1, 0, 0, -1, -1);
135 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
137 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
138 image_entry_noargs_t image_entry =
139 (image_entry_noargs_t) spl_image->entry_point;
141 debug("image entry point: 0x%X\n", spl_image->entry_point);
142 /* Pass the saved boot_params from rom code */
143 image_entry((u32 *)&gd->arch.omap_boot_params);