4 * Common bootmode functions for omap based boards
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/omap_common.h>
15 #include <asm/arch/omap.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <asm/arch/sys_proto.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 void save_omap_boot_params(void)
25 u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
27 u32 dev_desc, dev_data;
29 if ((rom_params < NON_SECURE_SRAM_START) ||
30 (rom_params > NON_SECURE_SRAM_END))
34 * rom_params can be type casted to omap_boot_parameters and
35 * used. But it not correct to assume that romcode structure
36 * encoding would be same as u-boot. So use the defined offsets.
38 boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
40 #if defined(BOOT_DEVICE_NAND_I2C)
42 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
43 * Otherwise the SPL boot IF can't handle this device correctly.
44 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
45 * Draco leads to this boot-device passed to SPL from the BootROM.
47 if (boot_device == BOOT_DEVICE_NAND_I2C)
48 boot_device = BOOT_DEVICE_NAND;
50 gd->arch.omap_boot_params.omap_bootdevice = boot_device;
52 gd->arch.omap_boot_params.ch_flags =
53 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
55 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
56 (boot_device <= MMC_BOOT_DEVICES_END)) {
57 #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
58 !defined(CONFIG_AM43XX)
59 if ((omap_hw_init_context() ==
60 OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
61 gd->arch.omap_boot_params.omap_bootmode =
62 *((u8 *)(rom_params + BOOT_MODE_OFFSET));
66 dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
67 dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
68 gd->arch.omap_boot_params.omap_bootmode =
69 *((u32 *)(dev_data + BOOT_MODE_OFFSET));
73 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
75 * We get different values for QSPI_1 and QSPI_4 being used, but
76 * don't actually care about this difference. Rather than
77 * mangle the later code, if we're coming in as QSPI_4 just
78 * change to the QSPI_1 value.
80 if (gd->arch.omap_boot_params.omap_bootdevice == 11)
81 gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
85 #ifdef CONFIG_SPL_BUILD
86 u32 spl_boot_device(void)
88 return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
91 u32 spl_boot_mode(void)
93 u32 val = gd->arch.omap_boot_params.omap_bootmode;
95 if (val == MMCSD_MODE_RAW)
96 return MMCSD_MODE_RAW;
97 else if (val == MMCSD_MODE_FS)
100 #ifdef CONFIG_SUPPORT_EMMC_BOOT
101 return MMCSD_MODE_EMMCBOOT;
103 return MMCSD_MODE_UNDEFINED;
107 void spl_board_init(void)
110 * Save the boot parameters passed from romcode.
111 * We cannot delay the saving further than this,
112 * to prevent overwrites.
114 save_omap_boot_params();
116 /* Prepare console output */
117 preloader_console_init();
119 #ifdef CONFIG_SPL_NAND_SUPPORT
122 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
125 #if defined(CONFIG_HW_WATCHDOG)
129 am33xx_spl_board_init();
133 int board_mmc_init(bd_t *bis)
135 switch (spl_boot_device()) {
136 case BOOT_DEVICE_MMC1:
137 omap_mmc_init(0, 0, 0, -1, -1);
139 case BOOT_DEVICE_MMC2:
140 case BOOT_DEVICE_MMC2_2:
141 omap_mmc_init(1, 0, 0, -1, -1);
147 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
149 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
150 image_entry_noargs_t image_entry =
151 (image_entry_noargs_t) spl_image->entry_point;
153 debug("image entry point: 0x%X\n", spl_image->entry_point);
154 /* Pass the saved boot_params from rom code */
155 image_entry((u32 *)&gd->arch.omap_boot_params);
159 #ifdef CONFIG_SCSI_AHCI_PLAT
160 void arch_preboot_os(void)
162 ahci_reset((void __iomem *)DWC_AHSATA_BASE);