2 * Board specific setup info
5 * Texas Instruments, <www.ti.com>
8 * Aneesh V <aneesh@ti.com>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/omap.h>
31 #include <asm/arch/spl.h>
32 #include <linux/linkage.h>
34 ENTRY(save_boot_params)
36 * See if the rom code passed pointer is valid:
37 * It is not valid if it is not in non-secure SRAM
38 * This may happen if you are booting with the help of
41 ldr r2, =NON_SECURE_SRAM_START
44 ldr r2, =NON_SECURE_SRAM_END
49 * store the boot params passed from rom code or saved
56 #ifdef CONFIG_SPL_BUILD
57 /* Store the boot device in spl_boot_device */
58 ldrb r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device
59 and r2, #BOOT_DEVICE_MASK
61 strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device <- r1
64 * boot mode is only valid for device that can be raw or FAT booted.
65 * in other cases it may be fatal to look. While platforms differ
66 * in the values used for each MMC slot, they are contiguous.
68 cmp r2, #MMC_BOOT_DEVICES_START
70 cmp r2, #MMC_BOOT_DEVICES_END
72 /* Store the boot mode (raw/FAT) in omap_bootmode */
73 ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr
74 ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr
75 ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode
76 ldr r3, =omap_bootmode
80 ldrb r2, [r0, #CH_FLAGS_OFFSET]
82 strb r2, [r3, #CH_FLAGS_OFFSET]
85 ENDPROC(save_boot_params)
87 ENTRY(set_pl310_ctrl_reg)
88 PUSH {r4-r11, lr} @ save registers - ROM code may pollute
90 LDR r12, =0x102 @ Set PL310 control register - value in R0
91 .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
92 @ call ROM Code API to set control register
94 ENDPROC(set_pl310_ctrl_reg)