3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/mem.h> /* get mem tables */
31 #include <asm/arch/sys_proto.h>
34 extern omap3_sysinfo sysinfo;
35 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
36 static char *rev_s[CPU_3XX_MAX_REV] = {
46 /*****************************************************************
47 * dieid_num_r(void) - read and set die ID
48 *****************************************************************/
49 void dieid_num_r(void)
51 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
52 char *uid_s, die_id[34];
55 memset(die_id, 0, sizeof(die_id));
57 uid_s = getenv("dieid#");
60 id[3] = readl(&id_base->die_id_0);
61 id[2] = readl(&id_base->die_id_1);
62 id[1] = readl(&id_base->die_id_2);
63 id[0] = readl(&id_base->die_id_3);
64 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
65 setenv("dieid#", die_id);
69 printf("Die ID #%s\n", uid_s);
72 /******************************************
73 * get_cpu_type(void) - extract cpu info
74 ******************************************/
75 u32 get_cpu_type(void)
77 return readl(&ctrl_base->ctrl_omap_stat);
80 /******************************************
81 * get_cpu_id(void) - extract cpu id
82 * returns 0 for ES1.0, cpuid otherwise
83 ******************************************/
86 struct ctrl_id *id_base;
90 * On ES1.0 the IDCODE register is not exposed on L4
91 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
93 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
94 if ((cpuid & 0xf) == 0x0) {
97 /* Decode the IDs on > ES1.0 */
98 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
100 cpuid = readl(&id_base->idcode);
106 /******************************************
107 * get_cpu_family(void) - extract cpu info
108 ******************************************/
109 u32 get_cpu_family(void)
113 u32 cpuid = get_cpu_id();
118 hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
120 case HAWKEYE_OMAP34XX:
121 cpu_family = CPU_OMAP34XX;
124 cpu_family = CPU_AM35XX;
126 case HAWKEYE_OMAP36XX:
127 cpu_family = CPU_OMAP36XX;
130 cpu_family = CPU_OMAP34XX;
136 /******************************************
137 * get_cpu_rev(void) - extract version info
138 ******************************************/
139 u32 get_cpu_rev(void)
141 u32 cpuid = get_cpu_id();
146 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
149 /*****************************************************************
150 * get_sku_id(void) - read sku_id to get info on max clock rate
151 *****************************************************************/
154 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
155 return readl(&id_base->sku_id) & SKUID_CLK_MASK;
158 /***************************************************************************
159 * get_gpmc0_base() - Return current address hardware will be
160 * fetching from. The below effectively gives what is correct, its a bit
161 * mis-leading compared to the TRM. For the most general case the mask
162 * needs to be also taken into account this does work in practice.
163 * - for u-boot we currently map:
168 ****************************************************************************/
169 u32 get_gpmc0_base(void)
173 b = readl(&gpmc_cfg->cs[0].config7);
174 b &= 0x1F; /* keep base [5:0] */
175 b = b << 24; /* ret 0x0b000000 */
179 /*******************************************************************
180 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
181 *******************************************************************/
182 u32 get_gpmc0_width(void)
187 /*************************************************************************
188 * get_board_rev() - setup to pass kernel board revision information
189 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
190 *************************************************************************/
191 u32 get_board_rev(void)
196 /********************************************************
197 * get_base(); get upper addr of current execution
198 *******************************************************/
203 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
209 /********************************************************
210 * is_running_in_flash() - tell if currently running in
212 *******************************************************/
213 u32 is_running_in_flash(void)
216 return 1; /* in FLASH */
218 return 0; /* running in SRAM or SDRAM */
221 /********************************************************
222 * is_running_in_sram() - tell if currently running in
224 *******************************************************/
225 u32 is_running_in_sram(void)
228 return 1; /* in SRAM */
230 return 0; /* running in FLASH or SDRAM */
233 /********************************************************
234 * is_running_in_sdram() - tell if currently running in
236 *******************************************************/
237 u32 is_running_in_sdram(void)
240 return 1; /* in SDRAM */
242 return 0; /* running in SRAM or FLASH */
245 /***************************************************************
246 * get_boot_type() - Is this an XIP type device or a stream one
247 * bits 4-0 specify type. Bit 5 says mem/perif
248 ***************************************************************/
249 u32 get_boot_type(void)
251 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
254 /*************************************************************
255 * get_device_type(): tell if GP/HS/EMU/TST
256 *************************************************************/
257 u32 get_device_type(void)
259 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
262 #ifdef CONFIG_DISPLAY_CPUINFO
264 * Print CPU information
266 int print_cpuinfo (void)
268 char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
270 switch (get_cpu_family()) {
272 cpu_family_s = "OMAP";
273 switch (get_cpu_type()) {
290 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
291 (get_sku_id() == SKUID_CLK_720MHZ))
299 switch (get_cpu_type()) {
313 cpu_family_s = "OMAP";
314 switch (get_cpu_type()) {
325 cpu_family_s = "OMAP";
330 switch (get_device_type()) {
347 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
348 cpu_family_s, cpu_s, sec_s,
349 rev_s[get_cpu_rev()], max_clk);
353 #endif /* CONFIG_DISPLAY_CPUINFO */