3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/mem.h> /* get mem tables */
18 #include <asm/arch/sys_proto.h>
20 #include <linux/compiler.h>
22 extern omap3_sysinfo sysinfo;
23 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
25 #ifdef CONFIG_DISPLAY_CPUINFO
26 static char *rev_s[CPU_3XX_MAX_REV] = {
36 /* this is the revision table for 37xx CPUs */
37 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
41 #endif /* CONFIG_DISPLAY_CPUINFO */
43 /*****************************************************************
44 * dieid_num_r(void) - read and set die ID
45 *****************************************************************/
46 void dieid_num_r(void)
48 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
49 char *uid_s, die_id[34];
52 memset(die_id, 0, sizeof(die_id));
54 uid_s = getenv("dieid#");
57 id[3] = readl(&id_base->die_id_0);
58 id[2] = readl(&id_base->die_id_1);
59 id[1] = readl(&id_base->die_id_2);
60 id[0] = readl(&id_base->die_id_3);
61 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
62 setenv("dieid#", die_id);
66 printf("Die ID #%s\n", uid_s);
69 /******************************************
70 * get_cpu_type(void) - extract cpu info
71 ******************************************/
72 u32 get_cpu_type(void)
74 return readl(&ctrl_base->ctrl_omap_stat);
77 /******************************************
78 * get_cpu_id(void) - extract cpu id
79 * returns 0 for ES1.0, cpuid otherwise
80 ******************************************/
83 struct ctrl_id *id_base;
87 * On ES1.0 the IDCODE register is not exposed on L4
88 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
90 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
91 if ((cpuid & 0xf) == 0x0) {
94 /* Decode the IDs on > ES1.0 */
95 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
97 cpuid = readl(&id_base->idcode);
103 /******************************************
104 * get_cpu_family(void) - extract cpu info
105 ******************************************/
106 u32 get_cpu_family(void)
110 u32 cpuid = get_cpu_id();
115 hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
117 case HAWKEYE_OMAP34XX:
118 cpu_family = CPU_OMAP34XX;
121 cpu_family = CPU_AM35XX;
123 case HAWKEYE_OMAP36XX:
124 cpu_family = CPU_OMAP36XX;
127 cpu_family = CPU_OMAP34XX;
133 /******************************************
134 * get_cpu_rev(void) - extract version info
135 ******************************************/
136 u32 get_cpu_rev(void)
138 u32 cpuid = get_cpu_id();
143 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
146 /*****************************************************************
147 * get_sku_id(void) - read sku_id to get info on max clock rate
148 *****************************************************************/
151 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
152 return readl(&id_base->sku_id) & SKUID_CLK_MASK;
155 /***************************************************************************
156 * get_gpmc0_base() - Return current address hardware will be
157 * fetching from. The below effectively gives what is correct, its a bit
158 * mis-leading compared to the TRM. For the most general case the mask
159 * needs to be also taken into account this does work in practice.
160 * - for u-boot we currently map:
165 ****************************************************************************/
166 u32 get_gpmc0_base(void)
170 b = readl(&gpmc_cfg->cs[0].config7);
171 b &= 0x1F; /* keep base [5:0] */
172 b = b << 24; /* ret 0x0b000000 */
176 /*******************************************************************
177 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
178 *******************************************************************/
179 u32 get_gpmc0_width(void)
184 /*************************************************************************
185 * get_board_rev() - setup to pass kernel board revision information
186 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
187 *************************************************************************/
188 u32 __weak get_board_rev(void)
193 /********************************************************
194 * get_base(); get upper addr of current execution
195 *******************************************************/
200 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
206 /********************************************************
207 * is_running_in_flash() - tell if currently running in
209 *******************************************************/
210 u32 is_running_in_flash(void)
213 return 1; /* in FLASH */
215 return 0; /* running in SRAM or SDRAM */
218 /********************************************************
219 * is_running_in_sram() - tell if currently running in
221 *******************************************************/
222 u32 is_running_in_sram(void)
225 return 1; /* in SRAM */
227 return 0; /* running in FLASH or SDRAM */
230 /********************************************************
231 * is_running_in_sdram() - tell if currently running in
233 *******************************************************/
234 u32 is_running_in_sdram(void)
237 return 1; /* in SDRAM */
239 return 0; /* running in SRAM or FLASH */
242 /***************************************************************
243 * get_boot_type() - Is this an XIP type device or a stream one
244 * bits 4-0 specify type. Bit 5 says mem/perif
245 ***************************************************************/
246 u32 get_boot_type(void)
248 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
251 /*************************************************************
252 * get_device_type(): tell if GP/HS/EMU/TST
253 *************************************************************/
254 u32 get_device_type(void)
256 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
259 #ifdef CONFIG_DISPLAY_CPUINFO
261 * Print CPU information
263 int print_cpuinfo (void)
265 char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
267 switch (get_cpu_family()) {
269 cpu_family_s = "OMAP";
270 switch (get_cpu_type()) {
287 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
288 (get_sku_id() == SKUID_CLK_720MHZ))
296 switch (get_cpu_type()) {
310 cpu_family_s = "OMAP";
311 switch (get_cpu_type()) {
322 cpu_family_s = "OMAP";
327 switch (get_device_type()) {
344 if (CPU_OMAP36XX == get_cpu_family())
345 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
346 cpu_family_s, cpu_s, sec_s,
347 rev_s_37xx[get_cpu_rev()], max_clk);
349 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
350 cpu_family_s, cpu_s, sec_s,
351 rev_s[get_cpu_rev()], max_clk);
355 #endif /* CONFIG_DISPLAY_CPUINFO */