2 * armboot - Startup Code for SA1100 CPU
4 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm-offsets.h>
33 *************************************************************************
35 * Jump vector table as in table 3.1 in [1]
37 *************************************************************************
43 ldr pc, _undefined_instruction
44 ldr pc, _software_interrupt
45 ldr pc, _prefetch_abort
51 _undefined_instruction: .word undefined_instruction
52 _software_interrupt: .word software_interrupt
53 _prefetch_abort: .word prefetch_abort
54 _data_abort: .word data_abort
55 _not_used: .word not_used
59 .balignl 16,0xdeadbeef
63 *************************************************************************
65 * Startup Code (reset vector)
67 * do important init only if we don't start from memory!
68 * relocate armboot to ram
70 * jump to second stage
72 *************************************************************************
77 .word CONFIG_SYS_TEXT_BASE
79 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
86 * These are defined in the board-specific linker script.
97 /* IRQ stack memory (calculated at run-time) */
98 .globl IRQ_STACK_START
102 /* IRQ stack memory (calculated at run-time) */
103 .globl FIQ_STACK_START
108 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
109 /* IRQ stack memory (calculated at run-time) + 8 bytes */
110 .globl IRQ_STACK_START_IN
114 .globl _datarel_start
116 .word __datarel_start
118 .globl _datarelrolocal_start
119 _datarelrolocal_start:
120 .word __datarelrolocal_start
122 .globl _datarellocal_start
124 .word __datarellocal_start
126 .globl _datarelro_start
128 .word __datarelro_start
139 * the actual reset code
144 * set the cpu to SVC32 mode
152 * we do sys-critical inits only at reboot,
153 * not when booting from ram!
155 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
159 /* Set stackpointer in internal RAM to call board_init_f */
161 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
165 /*------------------------------------------------------------------------------*/
168 * void relocate_code (addr_sp, gd, addr_moni)
170 * This "function" does not return, instead it continues in RAM
171 * after relocating the monitor code.
176 mov r4, r0 /* save addr_sp */
177 mov r5, r1 /* save addr of gd */
178 mov r6, r2 /* save addr of destination */
179 mov r7, r2 /* save addr of destination */
181 /* Set up the stack */
188 sub r2, r3, r2 /* r2 <- size of armboot */
189 add r2, r0, r2 /* r2 <- source end address */
193 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
195 ldmia r0!, {r9-r10} /* copy from source address [r0] */
196 stmia r6!, {r9-r10} /* copy to target address [r1] */
197 cmp r0, r2 /* until source end address [r2] */
200 #ifndef CONFIG_PRELOADER
201 /* fix got entries */
202 ldr r1, _TEXT_BASE /* Text base */
203 mov r0, r7 /* reloc addr */
204 ldr r2, _got_start /* addr in Flash */
205 ldr r3, _got_end /* addr in Flash */
220 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
223 #ifndef CONFIG_PRELOADER
226 ldr r3, _TEXT_BASE /* Text base */
227 mov r4, r7 /* reloc addr */
232 mov r2, #0x00000000 /* clear */
234 clbss_l:str r2, [r0] /* clear loop... */
241 * We are done. Do not return, instead branch to second part of board
242 * initialization, now running from RAM.
245 ldr r2, _board_init_r
247 add r2, r2, r7 /* position from board_init_r in RAM */
248 /* setup parameters for board_init_r */
249 mov r0, r5 /* gd_t */
250 mov r1, r7 /* dest_addr */
255 _board_init_r: .word board_init_r
257 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
260 * the actual reset code
265 * set the cpu to SVC32 mode
273 * we do sys-critical inits only at reboot,
274 * not when booting from ram!
276 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
280 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
281 relocate: /* relocate U-Boot to RAM */
282 adr r0, _start /* r0 <- current position of code */
283 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
284 cmp r0, r1 /* don't reloc during debug */
287 ldr r2, _armboot_start
289 sub r2, r3, r2 /* r2 <- size of armboot */
290 add r2, r0, r2 /* r2 <- source end address */
293 ldmia r0!, {r3-r10} /* copy from source address [r0] */
294 stmia r1!, {r3-r10} /* copy to target address [r1] */
295 cmp r0, r2 /* until source end address [r2] */
297 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
299 /* Set up the stack */
301 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
302 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
303 sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
304 #ifdef CONFIG_USE_IRQ
305 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
307 sub sp, r0, #12 /* leave 3 words for abort-stack */
308 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
311 ldr r0, _bss_start /* find start of bss segment */
312 ldr r1, _bss_end /* stop here */
313 mov r2, #0x00000000 /* clear */
315 clbss_l:str r2, [r0] /* clear loop... */
320 ldr pc, _start_armboot
322 _start_armboot: .word start_armboot
324 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
327 *************************************************************************
329 * CPU_init_critical registers
331 * setup important registers
332 * setup memory timing
334 *************************************************************************
338 /* Interupt-Controller base address */
339 IC_BASE: .word 0x90050000
343 /* Reset-Controller */
344 RST_BASE: .word 0x90030000
350 PWR_BASE: .word 0x90020000
353 cpuspeed: .word CONFIG_SYS_CPUSPEED
364 /* set clock speed */
370 * before relocating, we have to setup RAM timing
371 * because memory timing is board-dependend, you will
372 * find a lowlevel_init.S in your board directory.
379 * disable MMU stuff and enable I-cache
382 bic r0, r0, #0x00002000 @ clear bit 13 (X)
383 bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
384 orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
385 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
389 * flush v4 I/D caches
392 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
393 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
399 *************************************************************************
403 *************************************************************************
409 #define S_FRAME_SIZE 72
431 #define MODE_SVC 0x13
435 * use bad_save_user_regs for abort/prefetch/undef/swi ...
436 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
439 .macro bad_save_user_regs
440 sub sp, sp, #S_FRAME_SIZE
441 stmia sp, {r0 - r12} @ Calling r0-r12
444 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
445 ldr r2, _armboot_start
446 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
447 sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
449 ldr r2, IRQ_STACK_START_IN
451 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
452 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
456 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
460 .macro irq_save_user_regs
461 sub sp, sp, #S_FRAME_SIZE
462 stmia sp, {r0 - r12} @ Calling r0-r12
464 stmdb r8, {sp, lr}^ @ Calling SP, LR
465 str lr, [r8, #0] @ Save calling PC
467 str r6, [r8, #4] @ Save CPSR
468 str r0, [r8, #8] @ Save OLD_R0
472 .macro irq_restore_user_regs
473 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
475 ldr lr, [sp, #S_PC] @ Get PC
476 add sp, sp, #S_FRAME_SIZE
477 subs pc, lr, #4 @ return & move spsr_svc into cpsr
481 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
482 ldr r13, _armboot_start @ setup our mode stack
483 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
484 sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
486 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
489 str lr, [r13] @ save caller lr / spsr
493 mov r13, #MODE_SVC @ prepare SVC-Mode
499 .macro get_irq_stack @ setup IRQ stack
500 ldr sp, IRQ_STACK_START
503 .macro get_fiq_stack @ setup FIQ stack
504 ldr sp, FIQ_STACK_START
511 undefined_instruction:
514 bl do_undefined_instruction
520 bl do_software_interrupt
540 #ifdef CONFIG_USE_IRQ
547 irq_restore_user_regs
552 /* someone ought to write a more effiction fiq_save_user_regs */
555 irq_restore_user_regs
577 mov r1, #0x0 @ set bit 3-0 ...
578 str r1, [r0, #RCSR] @ ... to clear in RCSR
580 str r1, [r0, #RSRR] @ and perform reset
581 b reset_cpu @ silly, but repeat endlessly