git.sur5r.net Git - u-boot/blob - arch/arm/dts/r8a77970-eagle.dts

   1 /*
   2  * Device Tree Source for the Eagle board
   3  *
   4  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   5  * Copyright (C) 2017 Cogent Embedded, Inc.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0
   8  */
   9
  10 /dts-v1/;
  11 #include "r8a77970.dtsi"
  12
  13 / {
  14         model = "Renesas Eagle board based on r8a77970";
  15         compatible = "renesas,eagle", "renesas,r8a77970";
  16
  17         aliases {
  18                 serial0 = &scif0;
  19                 ethernet0 = &avb;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory@48000000 {
  28                 device_type = "memory";
  29                 /* first 128MB is reserved for secure area. */
  30                 reg = <0x0 0x48000000 0x0 0x38000000>;
  31         };
  32 };
  33
  34 &extal_clk {
  35         clock-frequency = <16666666>;
  36 };
  37
  38 &extalr_clk {
  39         clock-frequency = <32768>;
  40 };
  41
  42 &pfc {
  43         pinctrl-0 = <&scif_clk_pins>;
  44         pinctrl-names = "default";
  45
  46         scif0_pins: scif0 {
  47                 groups = "scif0_data";
  48                 function = "scif0";
  49         };
  50
  51         scif_clk_pins: scif_clk {
  52                 groups = "scif_clk_b";
  53                 function = "scif_clk";
  54         };
  55
  56         avb_pins: avb {
  57                 groups = "avb0_mdc";
  58                 function = "avb0";
  59         };
  60 };
  61
  62 &scif0 {
  63         pinctrl-0 = <&scif0_pins>;
  64         pinctrl-names = "default";
  65
  66         status = "okay";
  67 };
  68
  69 &scif_clk {
  70         clock-frequency = <14745600>;
  71         status = "okay";
  72 };
  73
  74 &avb {
  75         pinctrl-0 = <&avb_pins>;
  76         pinctrl-names = "default";
  77         renesas,no-ether-link;
  78         phy-handle = <&phy0>;
  79         status = "okay";
  80
  81         phy0: ethernet-phy@0 {
  82                 rxc-skew-ps = <1500>;
  83                 reg = <0>;
  84         };
  85 };