git.sur5r.net Git - u-boot/blob - arch/arm/dts/stm32mp157c-ed1.dts

   1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "stm32mp157.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/input/input.h>
  12 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  13
  14 / {
  15         model = "STMicroelectronics STM32MP157C pmic eval daughter";
  16         compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
  17
  18         chosen {
  19                 bootargs = "earlyprintk console=ttyS3,115200 root=/dev/ram";
  20                 stdout-path = "serial3:115200n8";
  21         };
  22
  23         memory {
  24                 reg = <0xC0000000 0x40000000>;
  25         };
  26 };
  27
  28 &gpioa {
  29         status = "okay";
  30 };
  31
  32 &gpiob {
  33         status = "okay";
  34 };
  35
  36 &gpioc {
  37         status = "okay";
  38 };
  39
  40 &gpiod {
  41         status = "okay";
  42 };
  43
  44 &gpioe {
  45         status = "okay";
  46 };
  47
  48 &gpiof {
  49         status = "okay";
  50 };
  51
  52 &gpiog {
  53         status = "okay";
  54 };
  55
  56 &gpioh {
  57         status = "okay";
  58 };
  59
  60 &gpioi {
  61         status = "okay";
  62 };
  63
  64 &gpioj {
  65         status = "okay";
  66 };
  67
  68 &gpiok {
  69         status = "okay";
  70 };
  71
  72 &gpioz {
  73         status = "okay";
  74 };
  75
  76 &pinctrl {
  77         uart4_pins_a: uart4@0 {
  78                 pins1 {
  79                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  80                         bias-disable;
  81                         drive-push-pull;
  82                         slew-rate = <0>;
  83                 };
  84                 pins2 {
  85                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  86                         bias-disable;
  87                 };
  88         };
  89
  90         sdmmc1_b4_pins_a: sdmmc1-b4@0 {
  91                 pins {
  92                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  93                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  94                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  95                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  96                                  <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
  97                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  98                         slew-rate = <3>;
  99                         drive-push-pull;
 100                         bias-disable;
 101                 };
 102         };
 103
 104         sdmmc1_dir_pins_a: sdmmc1-dir@0 {
 105                 pins {
 106                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
 107                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
 108                                  <STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */
 109                                  <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
 110                         slew-rate = <3>;
 111                         drive-push-pull;
 112                         bias-pull-up;
 113                 };
 114         };
 115         sdmmc2_b4_pins_a: sdmmc2-b4@0 {
 116                 pins {
 117                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
 118                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
 119                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
 120                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
 121                                  <STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
 122                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 123                         slew-rate = <3>;
 124                         drive-push-pull;
 125                         bias-pull-up;
 126                 };
 127         };
 128
 129         sdmmc2_d47_pins_a: sdmmc2-d47@0 {
 130                 pins {
 131                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
 132                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
 133                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
 134                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
 135                         slew-rate = <3>;
 136                         drive-push-pull;
 137                         bias-pull-up;
 138                 };
 139         };
 140 };
 141
 142 &pinctrl_z {
 143         i2c4_pins_a: i2c4@0 {
 144                 pins {
 145                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
 146                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
 147                         bias-disable;
 148                         drive-open-drain;
 149                         slew-rate = <0>;
 150                 };
 151         };
 152 };
 153
 154 &i2c4 {
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&i2c4_pins_a>;
 157         i2c-scl-rising-time-ns = <185>;
 158         i2c-scl-falling-time-ns = <20>;
 159         status = "okay";
 160
 161         pmic: stpmu1@33 {
 162                 compatible = "st,stpmu1";
 163                 reg = <0x33>;
 164                 interrupts = <0 2>;
 165                 interrupt-parent = <&gpioa>;
 166                 interrupt-controller;
 167                 #interrupt-cells = <2>;
 168                 status = "okay";
 169         };
 170 };
 171
 172 &sdmmc1 {
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
 175         broken-cd;
 176         st,dirpol;
 177         st,negedge;
 178         st,pin-ckin;
 179         bus-width = <4>;
 180         sd-uhs-sdr12;
 181         sd-uhs-sdr25;
 182         sd-uhs-sdr50;
 183         sd-uhs-ddr50;
 184         sd-uhs-sdr104;
 185         status = "okay";
 186 };
 187
 188 &sdmmc2 {
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
 191         non-removable;
 192         no-sd;
 193         no-sdio;
 194         st,dirpol;
 195         st,negedge;
 196         bus-width = <8>;
 197         status = "okay";
 198 };
 199
 200 &uart4 {
 201         pinctrl-names = "default";
 202         pinctrl-0 = <&uart4_pins_a>;
 203         status = "okay";
 204 };