1 /include/ "skeleton.dtsi"
4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>;
8 compatible = "nvidia,tegra20-host1x", "simple-bus";
9 reg = <0x50000000 0x00024000>;
10 interrupts = <0 65 0x04 /* mpcore syncpt */
11 0 67 0x04>; /* mpcore general */
17 ranges = <0x54000000 0x54000000 0x04000000>;
19 /* video-encoding/decoding */
21 reg = <0x54040000 0x00040000>;
22 interrupts = <0 68 0x04>;
28 reg = <0x54080000 0x00040000>;
29 interrupts = <0 69 0x04>;
35 reg = <0x540c0000 0x00040000>;
36 interrupts = <0 70 0x04>;
42 reg = <0x54100000 0x00040000>;
43 interrupts = <0 71 0x04>;
49 reg = <0x54140000 0x00040000>;
50 interrupts = <0 72 0x04>;
56 reg = <0x54180000 0x00040000>;
60 /* display controllers */
62 compatible = "nvidia,tegra20-dc";
63 reg = <0x54200000 0x00040000>;
64 interrupts = <0 73 0x04>;
73 compatible = "nvidia,tegra20-dc";
74 reg = <0x54240000 0x00040000>;
75 interrupts = <0 74 0x04>;
85 compatible = "nvidia,tegra20-hdmi";
86 reg = <0x54280000 0x00040000>;
87 interrupts = <0 75 0x04>;
92 compatible = "nvidia,tegra20-tvo";
93 reg = <0x542c0000 0x00040000>;
94 interrupts = <0 76 0x04>;
99 compatible = "nvidia,tegra20-dsi";
100 reg = <0x54300000 0x00040000>;
105 intc: interrupt-controller@50041000 {
106 compatible = "nvidia,tegra20-gic";
107 interrupt-controller;
108 #interrupt-cells = <1>;
109 reg = < 0x50041000 0x1000 >,
110 < 0x50040100 0x0100 >;
113 tegra_car: clock@60006000 {
114 compatible = "nvidia,tegra20-car";
115 reg = <0x60006000 0x1000>;
119 gpio: gpio@6000d000 {
120 compatible = "nvidia,tegra20-gpio";
121 reg = < 0x6000d000 0x1000 >;
122 interrupts = < 64 65 66 67 87 119 121 >;
127 pinmux: pinmux@70000000 {
128 compatible = "nvidia,tegra20-pinmux";
129 reg = < 0x70000014 0x10 /* Tri-state registers */
130 0x70000080 0x20 /* Mux registers */
131 0x700000a0 0x14 /* Pull-up/down registers */
132 0x70000868 0xa8 >; /* Pad control registers */
136 #address-cells = <1>;
138 compatible = "nvidia,tegra20-das";
139 reg = <0x70000c00 0x80>;
143 #address-cells = <1>;
145 compatible = "nvidia,tegra20-i2s";
146 reg = <0x70002800 0x200>;
152 #address-cells = <1>;
154 compatible = "nvidia,tegra20-i2s";
155 reg = <0x70002a00 0x200>;
161 compatible = "nvidia,tegra20-uart";
162 reg = <0x70006000 0x40>;
168 compatible = "nvidia,tegra20-uart";
169 reg = <0x70006040 0x40>;
175 compatible = "nvidia,tegra20-uart";
176 reg = <0x70006200 0x100>;
182 compatible = "nvidia,tegra20-uart";
183 reg = <0x70006300 0x100>;
185 interrupts = < 122 >;
189 compatible = "nvidia,tegra20-uart";
190 reg = <0x70006400 0x100>;
192 interrupts = < 123 >;
195 nand: nand-controller@70008000 {
196 #address-cells = <1>;
198 compatible = "nvidia,tegra20-nand";
199 reg = <0x70008000 0x100>;
203 compatible = "nvidia,tegra20-pwm";
204 reg = <0x7000a000 0x100>;
209 #address-cells = <1>;
211 compatible = "nvidia,tegra20-i2c";
212 reg = <0x7000C000 0x100>;
214 /* PERIPH_ID_I2C1, PLL_P_OUT3 */
215 clocks = <&tegra_car 12>, <&tegra_car 124>;
219 #address-cells = <1>;
221 compatible = "nvidia,tegra20-i2c";
222 reg = <0x7000C400 0x100>;
223 interrupts = < 116 >;
224 /* PERIPH_ID_I2C2, PLL_P_OUT3 */
225 clocks = <&tegra_car 54>, <&tegra_car 124>;
229 #address-cells = <1>;
231 compatible = "nvidia,tegra20-i2c";
232 reg = <0x7000C500 0x100>;
233 interrupts = < 124 >;
234 /* PERIPH_ID_I2C3, PLL_P_OUT3 */
235 clocks = <&tegra_car 67>, <&tegra_car 124>;
239 #address-cells = <1>;
241 compatible = "nvidia,tegra20-i2c-dvc";
242 reg = <0x7000D000 0x200>;
244 /* PERIPH_ID_DVC_I2C, PLL_P_OUT3 */
245 clocks = <&tegra_car 47>, <&tegra_car 124>;
249 compatible = "nvidia,tegra20-kbc";
250 reg = <0x7000e200 0x0078>;
254 #address-cells = < 1 >;
256 compatible = "nvidia,tegra20-emc";
257 reg = <0x7000f400 0x200>;
261 compatible = "nvidia,tegra20-ehci", "usb-ehci";
262 reg = <0xc5000000 0x4000>;
265 clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
266 nvidia,has-legacy-mode;
270 compatible = "nvidia,tegra20-ehci", "usb-ehci";
271 reg = <0xc5004000 0x4000>;
274 clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
278 compatible = "nvidia,tegra20-ehci", "usb-ehci";
279 reg = <0xc5008000 0x4000>;
280 interrupts = < 129 >;
282 clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
286 compatible = "nvidia,tegra20-sdhci";
287 reg = <0xc8000000 0x200>;
292 compatible = "nvidia,tegra20-sdhci";
293 reg = <0xc8000200 0x200>;
298 compatible = "nvidia,tegra20-sdhci";
299 reg = <0xc8000400 0x200>;
304 compatible = "nvidia,tegra20-sdhci";
305 reg = <0xc8000600 0x200>;