2 * Device Tree Source for the R-Car Gen3 ULCB board
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Renesas R-Car Gen3 ULCB board";
24 stdout-path = "serial0:115200n8";
28 compatible = "renesas,ulcb-cpld";
30 gpio-sck = <&gpio6 8 0>;
31 gpio-mosi = <&gpio6 7 0>;
32 gpio-miso = <&gpio6 10 0>;
33 gpio-sstbz = <&gpio2 3 0>;
36 audio_clkout: audio-clkout {
38 * This is same as <&rcar_sound 0>
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
43 clock-frequency = <11289600>;
47 compatible = "hdmi-connector";
57 compatible = "gpio-keys";
63 debounce-interval = <20>;
64 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
69 compatible = "gpio-leds";
72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
79 reg_1p8v: regulator0 {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-1.8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
88 reg_3p3v: regulator1 {
89 compatible = "regulator-fixed";
90 regulator-name = "fixed-3.3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
98 compatible = "simple-audio-card";
100 simple-audio-card,format = "left_j";
101 simple-audio-card,bitclock-master = <&sndcpu>;
102 simple-audio-card,frame-master = <&sndcpu>;
104 sndcpu: simple-audio-card,cpu {
105 sound-dai = <&rcar_sound>;
108 sndcodec: simple-audio-card,codec {
109 sound-dai = <&ak4613>;
113 vcc_sdhi0: regulator-vcc-sdhi0 {
114 compatible = "regulator-fixed";
116 regulator-name = "SDHI0 Vcc";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
120 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
124 vccq_sdhi0: regulator-vccq-sdhi0 {
125 compatible = "regulator-gpio";
127 regulator-name = "SDHI0 VccQ";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <3300000>;
131 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
138 compatible = "fixed-clock";
140 clock-frequency = <24576000>;
144 compatible = "fixed-clock";
146 clock-frequency = <25000000>;
151 clock-frequency = <22579200>;
155 pinctrl-0 = <&avb_pins>;
156 pinctrl-names = "default";
157 renesas,no-ether-link;
158 phy-handle = <&phy0>;
161 phy0: ethernet-phy@0 {
162 rxc-skew-ps = <1500>;
164 interrupt-parent = <&gpio2>;
165 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
174 clock-frequency = <16666666>;
178 clock-frequency = <32768>;
187 rcar_dw_hdmi0_out: endpoint {
188 remote-endpoint = <&hdmi0_con>;
195 remote-endpoint = <&rcar_dw_hdmi0_out>;
199 pinctrl-0 = <&i2c2_pins>;
200 pinctrl-names = "default";
204 clock-frequency = <100000>;
207 compatible = "asahi-kasei,ak4613";
208 #sound-dai-cells = <0>;
210 clocks = <&rcar_sound 3>;
212 asahi-kasei,in1-single-end;
213 asahi-kasei,in2-single-end;
214 asahi-kasei,out1-single-end;
215 asahi-kasei,out2-single-end;
216 asahi-kasei,out3-single-end;
217 asahi-kasei,out4-single-end;
218 asahi-kasei,out5-single-end;
219 asahi-kasei,out6-single-end;
222 cs2000: clk-multiplier@4f {
224 compatible = "cirrus,cs2000-cp";
226 clocks = <&audio_clkout>, <&x12_clk>;
227 clock-names = "clk_in", "ref_clk";
229 assigned-clocks = <&cs2000>;
230 assigned-clock-rates = <24576000>; /* 1/1 divide */
237 clock-frequency = <400000>;
239 versaclock5: clock-generator@6a {
240 compatible = "idt,5p49v5925";
257 pinctrl-0 = <&scif_clk_pins>;
258 pinctrl-names = "default";
262 groups = "avb_link", "avb_phy_int", "avb_mdc",
269 drive-strength = <24>;
273 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
274 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
275 drive-strength = <12>;
285 groups = "scif2_data_a";
289 scif_clk_pins: scif_clk {
290 groups = "scif_clk_a";
291 function = "scif_clk";
295 groups = "sdhi0_data4", "sdhi0_ctrl";
297 power-source = <3300>;
300 sdhi0_pins_uhs: sd0_uhs {
301 groups = "sdhi0_data4", "sdhi0_ctrl";
303 power-source = <1800>;
307 groups = "sdhi2_data8", "sdhi2_ctrl";
309 power-source = <1800>;
312 sdhi2_pins_uhs: sd2_uhs {
313 groups = "sdhi2_data8", "sdhi2_ctrl";
315 power-source = <1800>;
319 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
323 sound_clk_pins: sound-clk {
324 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
325 "audio_clkout_a", "audio_clkout3_a";
326 function = "audio_clk";
336 pinctrl-0 = <&sound_pins &sound_clk_pins>;
337 pinctrl-names = "default";
340 #sound-dai-cells = <0>;
342 /* audio_clkout0/1/2/3 */
344 clock-frequency = <12288000 11289600>;
348 /* update <audio_clk_b> to <cs2000> */
349 clocks = <&cpg CPG_MOD 1005>,
350 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
351 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
352 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
353 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
354 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
355 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
356 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
357 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
358 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
359 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
360 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
361 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
362 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
363 <&audio_clk_a>, <&cs2000>,
365 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
369 playback = <&ssi0 &src0 &dvc0>;
370 capture = <&ssi1 &src1 &dvc1>;
376 pinctrl-0 = <&scif2_pins>;
377 pinctrl-names = "default";
383 clock-frequency = <14745600>;
387 pinctrl-0 = <&sdhi0_pins>;
388 pinctrl-1 = <&sdhi0_pins_uhs>;
389 pinctrl-names = "default", "state_uhs";
391 vmmc-supply = <&vcc_sdhi0>;
392 vqmmc-supply = <&vccq_sdhi0>;
393 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
400 /* used for on-board 8bit eMMC */
401 pinctrl-0 = <&sdhi2_pins>;
402 pinctrl-1 = <&sdhi2_pins_uhs>;
403 pinctrl-names = "default", "state_uhs";
405 vmmc-supply = <®_3p3v>;
406 vqmmc-supply = <®_1p8v>;
418 pinctrl-0 = <&usb1_pins>;
419 pinctrl-names = "default";