git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynq-zc702.dts

   1 /*
   2  * Xilinx ZC702 board DTS
   3  *
   4  *  Copyright (C) 2011 - 2015 Xilinx
   5  *  Copyright (C) 2012 National Instruments Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 /dts-v1/;
  10 #include "zynq-7000.dtsi"
  11
  12 / {
  13         model = "Zynq ZC702 Development Board";
  14         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  15
  16         aliases {
  17                 ethernet0 = &gem0;
  18                 i2c0 = &i2c0;
  19                 serial0 = &uart1;
  20                 spi0 = &qspi;
  21                 mmc0 = &sdhci0;
  22         };
  23
  24         memory {
  25                 device_type = "memory";
  26                 reg = <0x0 0x40000000>;
  27         };
  28
  29         chosen {
  30                 bootargs = "";
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         gpio-keys {
  35                 compatible = "gpio-keys";
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38                 autorepeat;
  39                 sw14 {
  40                         label = "sw14";
  41                         gpios = <&gpio0 12 0>;
  42                         linux,code = <108>; /* down */
  43                         gpio-key,wakeup;
  44                         autorepeat;
  45                 };
  46                 sw13 {
  47                         label = "sw13";
  48                         gpios = <&gpio0 14 0>;
  49                         linux,code = <103>; /* up */
  50                         gpio-key,wakeup;
  51                         autorepeat;
  52                 };
  53         };
  54
  55         leds {
  56                 compatible = "gpio-leds";
  57
  58                 ds23 {
  59                         label = "ds23";
  60                         gpios = <&gpio0 10 0>;
  61                         linux,default-trigger = "heartbeat";
  62                 };
  63         };
  64
  65         usb_phy0: phy0 {
  66                 compatible = "usb-nop-xceiv";
  67                 #phy-cells = <0>;
  68         };
  69 };
  70
  71 &amba {
  72         ocm: sram@fffc0000 {
  73                 compatible = "mmio-sram";
  74                 reg = <0xfffc0000 0x10000>;
  75         };
  76 };
  77
  78 &can0 {
  79         status = "okay";
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&pinctrl_can0_default>;
  82 };
  83
  84 &clkc {
  85         ps-clk-frequency = <33333333>;
  86 };
  87
  88 &gem0 {
  89         status = "okay";
  90         phy-mode = "rgmii-id";
  91         phy-handle = <&ethernet_phy>;
  92         pinctrl-names = "default";
  93         pinctrl-0 = <&pinctrl_gem0_default>;
  94         phy-reset-gpio = <&gpio0 11 0>;
  95         phy-reset-active-low;
  96
  97         ethernet_phy: ethernet-phy@7 {
  98                 reg = <7>;
  99         };
 100 };
 101
 102 &gpio0 {
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&pinctrl_gpio0_default>;
 105 };
 106
 107 &i2c0 {
 108         status = "okay";
 109         clock-frequency = <400000>;
 110         pinctrl-names = "default";
 111         pinctrl-0 = <&pinctrl_i2c0_default>;
 112
 113         i2cswitch@74 {
 114                 compatible = "nxp,pca9548";
 115                 #address-cells = <1>;
 116                 #size-cells = <0>;
 117                 reg = <0x74>;
 118
 119                 i2c@0 {
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                         reg = <0>;
 123                         si570: clock-generator@5d {
 124                                 #clock-cells = <0>;
 125                                 compatible = "silabs,si570";
 126                                 temperature-stability = <50>;
 127                                 reg = <0x5d>;
 128                                 factory-fout = <156250000>;
 129                                 clock-frequency = <148500000>;
 130                         };
 131                 };
 132
 133                 i2c@2 {
 134                         #address-cells = <1>;
 135                         #size-cells = <0>;
 136                         reg = <2>;
 137                         eeprom@54 {
 138                                 compatible = "at,24c08";
 139                                 reg = <0x54>;
 140                         };
 141                 };
 142
 143                 i2c@3 {
 144                         #address-cells = <1>;
 145                         #size-cells = <0>;
 146                         reg = <3>;
 147                         gpio@21 {
 148                                 compatible = "ti,tca6416";
 149                                 reg = <0x21>;
 150                                 gpio-controller;
 151                                 #gpio-cells = <2>;
 152                         };
 153                 };
 154
 155                 i2c@4 {
 156                         #address-cells = <1>;
 157                         #size-cells = <0>;
 158                         reg = <4>;
 159                         rtc@51 {
 160                                 compatible = "nxp,pcf8563";
 161                                 reg = <0x51>;
 162                         };
 163                 };
 164
 165                 i2c@7 {
 166                         #address-cells = <1>;
 167                         #size-cells = <0>;
 168                         reg = <7>;
 169                         hwmon@52 {
 170                                 compatible = "ti,ucd9248";
 171                                 reg = <52>;
 172                         };
 173                         hwmon@53 {
 174                                 compatible = "ti,ucd9248";
 175                                 reg = <53>;
 176                         };
 177                         hwmon@54 {
 178                                 compatible = "ti,ucd9248";
 179                                 reg = <54>;
 180                         };
 181                 };
 182         };
 183 };
 184
 185 &pinctrl0 {
 186         pinctrl_can0_default: can0-default {
 187                 mux {
 188                         function = "can0";
 189                         groups = "can0_9_grp";
 190                 };
 191
 192                 conf {
 193                         groups = "can0_9_grp";
 194                         slew-rate = <0>;
 195                         io-standard = <1>;
 196                 };
 197
 198                 conf-rx {
 199                         pins = "MIO46";
 200                         bias-high-impedance;
 201                 };
 202
 203                 conf-tx {
 204                         pins = "MIO47";
 205                         bias-disable;
 206                 };
 207         };
 208
 209         pinctrl_gem0_default: gem0-default {
 210                 mux {
 211                         function = "ethernet0";
 212                         groups = "ethernet0_0_grp";
 213                 };
 214
 215                 conf {
 216                         groups = "ethernet0_0_grp";
 217                         slew-rate = <0>;
 218                         io-standard = <4>;
 219                 };
 220
 221                 conf-rx {
 222                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 223                         bias-high-impedance;
 224                         low-power-disable;
 225                 };
 226
 227                 conf-tx {
 228                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 229                         bias-disable;
 230                         low-power-enable;
 231                 };
 232
 233                 mux-mdio {
 234                         function = "mdio0";
 235                         groups = "mdio0_0_grp";
 236                 };
 237
 238                 conf-mdio {
 239                         groups = "mdio0_0_grp";
 240                         slew-rate = <0>;
 241                         io-standard = <1>;
 242                         bias-disable;
 243                 };
 244         };
 245
 246         pinctrl_gpio0_default: gpio0-default {
 247                 mux {
 248                         function = "gpio0";
 249                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 250                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 251                                  "gpio0_13_grp", "gpio0_14_grp";
 252                 };
 253
 254                 conf {
 255                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 256                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 257                                  "gpio0_13_grp", "gpio0_14_grp";
 258                         slew-rate = <0>;
 259                         io-standard = <1>;
 260                 };
 261
 262                 conf-pull-up {
 263                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 264                         bias-pull-up;
 265                 };
 266
 267                 conf-pull-none {
 268                         pins = "MIO7", "MIO8";
 269                         bias-disable;
 270                 };
 271         };
 272
 273         pinctrl_i2c0_default: i2c0-default {
 274                 mux {
 275                         groups = "i2c0_10_grp";
 276                         function = "i2c0";
 277                 };
 278
 279                 conf {
 280                         groups = "i2c0_10_grp";
 281                         bias-pull-up;
 282                         slew-rate = <0>;
 283                         io-standard = <1>;
 284                 };
 285         };
 286
 287         pinctrl_sdhci0_default: sdhci0-default {
 288                 mux {
 289                         groups = "sdio0_2_grp";
 290                         function = "sdio0";
 291                 };
 292
 293                 conf {
 294                         groups = "sdio0_2_grp";
 295                         slew-rate = <0>;
 296                         io-standard = <1>;
 297                         bias-disable;
 298                 };
 299
 300                 mux-cd {
 301                         groups = "gpio0_0_grp";
 302                         function = "sdio0_cd";
 303                 };
 304
 305                 conf-cd {
 306                         groups = "gpio0_0_grp";
 307                         bias-high-impedance;
 308                         bias-pull-up;
 309                         slew-rate = <0>;
 310                         io-standard = <1>;
 311                 };
 312
 313                 mux-wp {
 314                         groups = "gpio0_15_grp";
 315                         function = "sdio0_wp";
 316                 };
 317
 318                 conf-wp {
 319                         groups = "gpio0_15_grp";
 320                         bias-high-impedance;
 321                         bias-pull-up;
 322                         slew-rate = <0>;
 323                         io-standard = <1>;
 324                 };
 325         };
 326
 327         pinctrl_uart1_default: uart1-default {
 328                 mux {
 329                         groups = "uart1_10_grp";
 330                         function = "uart1";
 331                 };
 332
 333                 conf {
 334                         groups = "uart1_10_grp";
 335                         slew-rate = <0>;
 336                         io-standard = <1>;
 337                 };
 338
 339                 conf-rx {
 340                         pins = "MIO49";
 341                         bias-high-impedance;
 342                 };
 343
 344                 conf-tx {
 345                         pins = "MIO48";
 346                         bias-disable;
 347                 };
 348         };
 349
 350         pinctrl_usb0_default: usb0-default {
 351                 mux {
 352                         groups = "usb0_0_grp";
 353                         function = "usb0";
 354                 };
 355
 356                 conf {
 357                         groups = "usb0_0_grp";
 358                         slew-rate = <0>;
 359                         io-standard = <1>;
 360                 };
 361
 362                 conf-rx {
 363                         pins = "MIO29", "MIO31", "MIO36";
 364                         bias-high-impedance;
 365                 };
 366
 367                 conf-tx {
 368                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 369                                "MIO35", "MIO37", "MIO38", "MIO39";
 370                         bias-disable;
 371                 };
 372         };
 373 };
 374
 375 &sdhci0 {
 376         u-boot,dm-pre-reloc;
 377         status = "okay";
 378         pinctrl-names = "default";
 379         pinctrl-0 = <&pinctrl_sdhci0_default>;
 380 };
 381
 382 &uart1 {
 383         u-boot,dm-pre-reloc;
 384         status = "okay";
 385         pinctrl-names = "default";
 386         pinctrl-0 = <&pinctrl_uart1_default>;
 387 };
 388
 389 &qspi {
 390         u-boot,dm-pre-reloc;
 391         status = "okay";
 392 };
 393
 394 &usb0 {
 395         status = "okay";
 396         dr_mode = "host";
 397         usb-phy = <&usb_phy0>;
 398         pinctrl-names = "default";
 399         pinctrl-0 = <&pinctrl_usb0_default>;
 400 };