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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
4  *
5  * (C) Copyright 2015 - 2018, Xilinx, Inc.
6  *
7  * Michal Simek <michal.simek@xilinx.com>
8  */
9
10 /dts-v1/;
11
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14
15 / {
16         model = "ZynqMP zc1751-xm016-dc2 RevA";
17         compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
18
19         aliases {
20                 can0 = &can0;
21                 can1 = &can1;
22                 ethernet0 = &gem2;
23                 gpio0 = &gpio;
24                 i2c0 = &i2c0;
25                 rtc0 = &rtc;
26                 serial0 = &uart0;
27                 serial1 = &uart1;
28                 spi0 = &spi0;
29                 spi1 = &spi1;
30                 usb0 = &usb1;
31         };
32
33         chosen {
34                 bootargs = "earlycon";
35                 stdout-path = "serial0:115200n8";
36         };
37
38         memory@0 {
39                 device_type = "memory";
40                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
41         };
42 };
43
44 &can0 {
45         status = "okay";
46 };
47
48 &can1 {
49         status = "okay";
50 };
51
52 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
53 &fpd_dma_chan1 {
54         status = "okay";
55 };
56
57 &fpd_dma_chan2 {
58         status = "okay";
59 };
60
61 &fpd_dma_chan3 {
62         status = "okay";
63 };
64
65 &fpd_dma_chan4 {
66         status = "okay";
67 };
68
69 &fpd_dma_chan5 {
70         status = "okay";
71 };
72
73 &fpd_dma_chan6 {
74         status = "okay";
75 };
76
77 &fpd_dma_chan7 {
78         status = "okay";
79 };
80
81 &fpd_dma_chan8 {
82         status = "okay";
83 };
84
85 &gem2 {
86         status = "okay";
87         phy-handle = <&phy0>;
88         phy-mode = "rgmii-id";
89         phy0: phy@5 {
90                 reg = <5>;
91                 ti,rx-internal-delay = <0x8>;
92                 ti,tx-internal-delay = <0xa>;
93                 ti,fifo-depth = <0x1>;
94         };
95 };
96
97 &gpio {
98         status = "okay";
99 };
100
101 &i2c0 {
102         status = "okay";
103         clock-frequency = <400000>;
104
105         tca6416_u26: gpio@20 {
106                 compatible = "ti,tca6416";
107                 reg = <0x20>;
108                 gpio-controller;
109                 #gpio-cells = <2>;
110                 /* IRQ not connected */
111         };
112
113         rtc@68 {
114                 compatible = "dallas,ds1339";
115                 reg = <0x68>;
116         };
117 };
118
119 &nand0 {
120         status = "okay";
121         arasan,has-mdma;
122         num-cs = <2>;
123
124         partition@0 {   /* for testing purpose */
125                 label = "nand-fsbl-uboot";
126                 reg = <0x0 0x0 0x400000>;
127         };
128         partition@1 {   /* for testing purpose */
129                 label = "nand-linux";
130                 reg = <0x0 0x400000 0x1400000>;
131         };
132         partition@2 {   /* for testing purpose */
133                 label = "nand-device-tree";
134                 reg = <0x0 0x1800000 0x400000>;
135         };
136         partition@3 {   /* for testing purpose */
137                 label = "nand-rootfs";
138                 reg = <0x0 0x1C00000 0x1400000>;
139         };
140         partition@4 {   /* for testing purpose */
141                 label = "nand-bitstream";
142                 reg = <0x0 0x3000000 0x400000>;
143         };
144         partition@5 {   /* for testing purpose */
145                 label = "nand-misc";
146                 reg = <0x0 0x3400000 0xFCC00000>;
147         };
148
149         partition@6 {   /* for testing purpose */
150                 label = "nand1-fsbl-uboot";
151                 reg = <0x1 0x0 0x400000>;
152         };
153         partition@7 {   /* for testing purpose */
154                 label = "nand1-linux";
155                 reg = <0x1 0x400000 0x1400000>;
156         };
157         partition@8 {   /* for testing purpose */
158                 label = "nand1-device-tree";
159                 reg = <0x1 0x1800000 0x400000>;
160         };
161         partition@9 {   /* for testing purpose */
162                 label = "nand1-rootfs";
163                 reg = <0x1 0x1C00000 0x1400000>;
164         };
165         partition@10 {  /* for testing purpose */
166                 label = "nand1-bitstream";
167                 reg = <0x1 0x3000000 0x400000>;
168         };
169         partition@11 {  /* for testing purpose */
170                 label = "nand1-misc";
171                 reg = <0x1 0x3400000 0xFCC00000>;
172         };
173 };
174
175 &rtc {
176         status = "okay";
177 };
178
179 &spi0 {
180         status = "okay";
181         num-cs = <1>;
182         spi0_flash0: spi0_flash0@0 {
183                 compatible = "m25p80";
184                 #address-cells = <1>;
185                 #size-cells = <1>;
186                 spi-max-frequency = <50000000>;
187                 reg = <0>;
188
189                 spi0_flash0@0 {
190                         label = "spi0_flash0";
191                         reg = <0x0 0x100000>;
192                 };
193         };
194 };
195
196 &spi1 {
197         status = "okay";
198         num-cs = <1>;
199         spi1_flash0: spi1_flash0@0 {
200                 compatible = "mtd_dataflash";
201                 #address-cells = <1>;
202                 #size-cells = <1>;
203                 spi-max-frequency = <20000000>;
204                 reg = <0>;
205
206                 spi1_flash0@0 {
207                         label = "spi1_flash0";
208                         reg = <0x0 0x84000>;
209                 };
210         };
211 };
212
213 /* ULPI SMSC USB3320 */
214 &usb1 {
215         status = "okay";
216 };
217
218 &dwc3_1 {
219         status = "okay";
220         dr_mode = "host";
221 };
222
223 &uart0 {
224         status = "okay";
225 };
226
227 &uart1 {
228         status = "okay";
229 };