2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
10 #ifdef CONFIG_SECURE_BOOT
12 #ifndef CONFIG_FIT_SIGNATURE
13 #define CONFIG_CHAIN_OF_TRUST
18 #ifdef CONFIG_CHAIN_OF_TRUST
19 #define CONFIG_CMD_ESBC_VALIDATE
20 #define CONFIG_FSL_SEC_MON
21 #define CONFIG_SHA_HW_ACCEL
22 #define CONFIG_SHA_PROG_HW_ACCEL
23 #define CONFIG_RSA_FREESCALE_EXP
25 #ifndef CONFIG_FSL_CAAM
26 #define CONFIG_FSL_CAAM
29 #define CONFIG_SPL_BOARD_INIT
30 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
31 #ifdef CONFIG_SPL_BUILD
33 * Define the key hash for U-Boot here if public/private key pair used to
34 * sign U-boot are different from the SRK hash put in the fuse
35 * Example of defining KEY_HASH is
36 * #define CONFIG_SPL_UBOOT_KEY_HASH \
37 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
38 * else leave it defined as NULL
41 #define CONFIG_SPL_UBOOT_KEY_HASH NULL
42 #endif /* ifdef CONFIG_SPL_BUILD */
44 #ifndef CONFIG_SPL_BUILD
45 #define CONFIG_CMD_BLOB
46 #define CONFIG_CMD_HASH
47 #define CONFIG_KEY_REVOCATION
48 #ifndef CONFIG_SYS_RAMBOOT
49 /* The key used for verification of next level images
50 * is picked up from an Extension Table which has
51 * been verified by the ISBC (Internal Secure boot Code)
52 * in boot ROM of the SoC.
53 * The feature is only applicable in case of NOR boot and is
54 * not applicable in case of RAMBOOT (NAND, SD, SPI).
56 #ifndef CONFIG_ESBC_HDR_LS
57 /* Current Key EXT feature not available in LS ESBC Header */
58 #define CONFIG_FSL_ISBC_KEY_EXT
63 #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
64 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
65 * Similiarly for LS2080
67 #define CONFIG_ESBC_ADDR_64BIT
71 #define CONFIG_EXTRA_ENV \
72 "setenv fdt_high 0xa0000000;" \
73 "setenv initrd_high 0xcfffffff;" \
74 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
76 #define CONFIG_EXTRA_ENV \
77 "setenv fdt_high 0xffffffff;" \
78 "setenv initrd_high 0xffffffff;" \
79 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
82 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
83 * Non-XIP Memory (Nand/SD)*/
84 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
85 defined(CONFIG_SD_BOOT)
86 #define CONFIG_BOOTSCRIPT_COPY_RAM
88 /* The address needs to be modified according to NOR, NAND, SD and
92 #define CONFIG_BS_HDR_ADDR_DEVICE 0x583920000
93 #define CONFIG_BS_ADDR_DEVICE 0x583900000
94 #define CONFIG_BS_HDR_ADDR_RAM 0xa3920000
95 #define CONFIG_BS_ADDR_RAM 0xa3900000
96 #define CONFIG_BS_HDR_SIZE 0x00002000
97 #define CONFIG_BS_SIZE 0x00001000
100 /* For SD boot address and size are assigned in terms of sector
101 * offset and no. of sectors respectively.
103 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000800
104 #define CONFIG_BS_ADDR_DEVICE 0x00000840
105 #define CONFIG_BS_HDR_SIZE 0x00000010
106 #define CONFIG_BS_SIZE 0x00000008
108 #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
109 #define CONFIG_BS_ADDR_DEVICE 0x60060000
110 #define CONFIG_BS_HDR_SIZE 0x00002000
111 #define CONFIG_BS_SIZE 0x00001000
112 #endif /* #ifdef CONFIG_SD_BOOT */
113 #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
114 #define CONFIG_BS_ADDR_RAM 0x81020000
117 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
118 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
119 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
121 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
122 /* BOOTSCRIPT_ADDR is not required */
125 #include <config_fsl_chain_trust.h>
126 #endif /* #ifndef CONFIG_SPL_BUILD */
127 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */