4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
36 select SPL_DRIVERS_MISC_SUPPORT
37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
38 select BOARD_LATE_INIT
39 select ROCKCHIP_BROM_HELPER
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
47 config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60 config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
63 select SPL_BOARD_INIT if SPL
66 imply USB_FUNCTION_ROCKUSB
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
73 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
78 default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
85 config ROCKCHIP_RK3328
86 bool "Support Rockchip RK3328"
89 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
90 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
91 video interfaces supporting HDMI and eDP, several DDR3 options
92 and video codec support. Peripherals include Gigabit Ethernet,
93 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
95 config ROCKCHIP_RK3368
96 bool "Support Rockchip RK3368"
100 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
101 select TPL_NEEDS_SEPARATE_STACK if TPL
102 imply SPL_SEPARATE_BSS
103 imply SPL_SERIAL_SUPPORT
104 imply TPL_SERIAL_SUPPORT
105 select DEBUG_UART_BOARD_INIT
107 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
108 into a big and little cluster with 4 cores each) Cortex-A53 including
109 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
110 (for the little cluster), PowerVR G6110 based graphics, one video
111 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
114 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
115 I2S, UARTs, SPI, I2C and PWMs.
120 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
133 config ROCKCHIP_RK3399
134 bool "Support Rockchip RK3399"
138 select SPL_SEPARATE_BSS
139 select SPL_SERIAL_SUPPORT
140 select SPL_DRIVERS_MISC_SUPPORT
141 select DEBUG_UART_BOARD_INIT
142 select BOARD_LATE_INIT
143 select ROCKCHIP_BROM_HELPER
145 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
146 and quad-core Cortex-A53.
147 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
148 video interfaces supporting HDMI and eDP, several DDR3 options
149 and video codec support. Peripherals include Gigabit Ethernet,
150 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
152 config ROCKCHIP_RV1108
153 bool "Support Rockchip RV1108"
156 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
159 config SPL_ROCKCHIP_BACK_TO_BROM
160 bool "SPL returns to bootrom"
161 default y if ROCKCHIP_RK3036
162 select ROCKCHIP_BROM_HELPER
165 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
166 SPL will return to the boot rom, which will then load the U-Boot
167 binary to keep going on.
169 config TPL_ROCKCHIP_BACK_TO_BROM
170 bool "TPL returns to bootrom"
171 default y if ROCKCHIP_RK3368
172 select ROCKCHIP_BROM_HELPER
175 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
176 SPL will return to the boot rom, which will then load the U-Boot
177 binary to keep going on.
179 config ROCKCHIP_BOOT_MODE_REG
180 hex "Rockchip boot mode flag register address"
181 default 0x200081c8 if ROCKCHIP_RK3036
182 default 0x20004040 if ROCKCHIP_RK3188
183 default 0x110005c8 if ROCKCHIP_RK322X
184 default 0xff730094 if ROCKCHIP_RK3288
185 default 0xff738200 if ROCKCHIP_RK3368
186 default 0xff320300 if ROCKCHIP_RK3399
187 default 0x10300580 if ROCKCHIP_RV1108
190 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
191 according to the value from this register.
193 config ROCKCHIP_SPL_RESERVE_IRAM
194 hex "Size of IRAM reserved in SPL"
197 SPL may need reserve memory for firmware loaded by SPL, whose load
198 address is in IRAM and may overlay with SPL text area if not
201 config ROCKCHIP_BROM_HELPER
204 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
205 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
206 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
208 Some Rockchip BROM variants (e.g. on the RK3188) load the
209 first stage in segments and enter multiple times. E.g. on
210 the RK3188, the first 1KB of the first stage are loaded
211 first and entered; after returning to the BROM, the
212 remainder of the first stage is loaded, but the BROM
213 re-enters at the same address/to the same code as previously.
215 This enables support code in the BOOT0 hook for the SPL stage
216 to allow multiple entries.
218 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
219 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
220 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
222 Some Rockchip BROM variants (e.g. on the RK3188) load the
223 first stage in segments and enter multiple times. E.g. on
224 the RK3188, the first 1KB of the first stage are loaded
225 first and entered; after returning to the BROM, the
226 remainder of the first stage is loaded, but the BROM
227 re-enters at the same address/to the same code as previously.
229 This enables support code in the BOOT0 hook for the TPL stage
230 to allow multiple entries.
232 config SPL_MMC_SUPPORT
233 default y if !SPL_ROCKCHIP_BACK_TO_BROM
235 source "arch/arm/mach-rockchip/rk3036/Kconfig"
236 source "arch/arm/mach-rockchip/rk3128/Kconfig"
237 source "arch/arm/mach-rockchip/rk3188/Kconfig"
238 source "arch/arm/mach-rockchip/rk322x/Kconfig"
239 source "arch/arm/mach-rockchip/rk3288/Kconfig"
240 source "arch/arm/mach-rockchip/rk3328/Kconfig"
241 source "arch/arm/mach-rockchip/rk3368/Kconfig"
242 source "arch/arm/mach-rockchip/rk3399/Kconfig"
243 source "arch/arm/mach-rockchip/rv1108/Kconfig"