2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/freeze_controller.h>
10 #include <asm/arch/scan_manager.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 static const struct socfpga_scan_manager *scan_manager_base =
15 (void *)(SOCFPGA_SCANMGR_ADDRESS);
16 static const struct socfpga_freeze_controller *freeze_controller_base =
17 (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
20 * Function to check IO scan chain engine status and wait if the engine is
21 * is active. Poll the IO scan chain engine till maximum iteration reached.
23 static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter)
25 uint32_t scanmgr_status;
27 scanmgr_status = readl(&scan_manager_base->stat);
29 /* Poll the engine until the scan engine is inactive */
30 while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) ||
31 (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) > 0)) {
34 scanmgr_status = readl(&scan_manager_base->stat);
42 * scan_mgr_io_scan_chain_prg() - Program HPS IO Scan Chain
43 * @io_scan_chain_id: IO scan chain ID
44 * @io_scan_chain_len_in_bits: IO scan chain length in bits
45 * @iocsr_scan_chain: IO scan chain table
47 static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id,
48 uint32_t io_scan_chain_len_in_bits,
49 const uint32_t *iocsr_scan_chain)
51 uint16_t tdi_tdo_header;
52 uint32_t io_program_iter;
53 uint32_t io_scan_chain_data_residual;
59 * De-assert reinit if the IO scan chain is intended for HIO. In
60 * this, its the chain 3.
62 if (io_scan_chain_id == 3)
63 clrbits_le32(&freeze_controller_base->hioctrl,
64 SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
67 * Check if the scan chain engine is inactive and the
68 * WFIFO is empty before enabling the IO scan chain
70 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
74 * Enable IO Scan chain based on scan chain id
75 * Note: only one chain can be enabled at a time
77 setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
80 * Calculate number of iteration needed for full 128-bit (4 x32-bits)
81 * bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
83 io_program_iter = io_scan_chain_len_in_bits >>
84 IO_SCAN_CHAIN_128BIT_SHIFT;
85 io_scan_chain_data_residual = io_scan_chain_len_in_bits &
86 IO_SCAN_CHAIN_128BIT_MASK;
88 /* Construct TDI_TDO packet for 128-bit IO scan chain (2 bytes) */
89 tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
90 (TDI_TDO_MAX_PAYLOAD << TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
92 /* Program IO scan chain in 128-bit iteration */
93 for (i = 0; i < io_program_iter; i++) {
94 /* write TDI_TDO packet header to scan manager */
95 writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
97 /* calculate array index. Multiply by 4 as write 4 x 32bits */
100 /* write 4 successive 32-bit IO scan chain data into WFIFO */
101 writel(iocsr_scan_chain[index],
102 &scan_manager_base->fifo_quad_byte);
103 writel(iocsr_scan_chain[index + 1],
104 &scan_manager_base->fifo_quad_byte);
105 writel(iocsr_scan_chain[index + 2],
106 &scan_manager_base->fifo_quad_byte);
107 writel(iocsr_scan_chain[index + 3],
108 &scan_manager_base->fifo_quad_byte);
111 * Check if the scan chain engine has completed the
112 * IO scan chain data shifting
114 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
118 /* Calculate array index for final TDI_TDO packet */
119 index = io_program_iter * 4;
121 /* Final TDI_TDO packet if any */
122 if (io_scan_chain_data_residual) {
124 * Calculate number of quad bytes FIFO write
125 * needed for the final TDI_TDO packet
127 io_program_iter = io_scan_chain_data_residual >>
128 IO_SCAN_CHAIN_32BIT_SHIFT;
131 * Construct TDI_TDO packet for remaining IO
132 * scan chain (2 bytes)
134 tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
135 ((io_scan_chain_data_residual - 1) <<
136 TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
139 * Program the last part of IO scan chain write TDI_TDO packet
140 * header (2 bytes) to scan manager
142 writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
144 for (i = 0; i < io_program_iter; i++) {
146 * write remaining scan chain data into scan
147 * manager WFIFO with 4 bytes write
149 writel(iocsr_scan_chain[index + i],
150 &scan_manager_base->fifo_quad_byte);
153 index += io_program_iter;
154 residual = io_scan_chain_data_residual &
155 IO_SCAN_CHAIN_32BIT_MASK;
157 if (IO_SCAN_CHAIN_PAYLOAD_24BIT < residual) {
159 * write the last 4B scan chain data
160 * into scan manager WFIFO
162 writel(iocsr_scan_chain[index],
163 &scan_manager_base->fifo_quad_byte);
166 * write the remaining 1 - 3 bytes scan chain
167 * data into scan manager WFIFO byte by byte
168 * to prevent JTAG engine shifting unused data
169 * from the FIFO and mistaken the data as a
170 * valid command (even though unused bits are
171 * set to 0, but just to prevent hardware
174 for (i = 0; i < residual; i += 8) {
175 writel(((iocsr_scan_chain[index] >> i)
176 & IO_SCAN_CHAIN_BYTE_MASK),
177 &scan_manager_base->fifo_single_byte);
182 * Check if the scan chain engine has completed the
183 * IO scan chain data shifting
185 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
189 /* Disable IO Scan chain when configuration done*/
190 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
194 /* Disable IO Scan chain when error detected */
195 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
199 int scan_mgr_configure_iocsr(void)
203 /* configure the IOCSR through scan chain */
204 status |= scan_mgr_io_scan_chain_prg(0,
205 CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH, iocsr_scan_chain0_table);
206 status |= scan_mgr_io_scan_chain_prg(1,
207 CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH, iocsr_scan_chain1_table);
208 status |= scan_mgr_io_scan_chain_prg(2,
209 CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH, iocsr_scan_chain2_table);
210 status |= scan_mgr_io_scan_chain_prg(3,
211 CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH, iocsr_scan_chain3_table);