2 * Copyright (C) 2004-2006 Atmel Corporation
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/errno.h>
27 #include <asm/processor.h>
28 #include <asm/sysreg.h>
30 #include <asm/arch/hardware.h>
32 #define HANDLER_MASK 0x00ffffff
33 #define INTLEV_SHIFT 30
34 #define INTLEV_MASK 0x00000003
36 DECLARE_GLOBAL_DATA_PTR;
38 /* Incremented whenever COUNT reaches 0xffffffff by timer_interrupt_handler */
39 volatile unsigned long timer_overflow;
42 * Instead of dividing by get_tbclk(), multiply by this constant and
43 * right-shift the result by 32 bits.
45 static unsigned long tb_factor;
47 unsigned long get_tbclk(void)
52 unsigned long long get_ticks(void)
54 unsigned long lo, hi_now, hi_prev;
57 hi_prev = timer_overflow;
58 lo = sysreg_read(COUNT);
59 hi_now = timer_overflow;
60 } while (hi_prev != hi_now);
62 return ((unsigned long long)hi_now << 32) | lo;
65 void reset_timer(void)
67 sysreg_write(COUNT, 0);
68 cpu_sync_pipeline(); /* process any pending interrupts */
72 unsigned long get_timer(unsigned long base)
74 u64 now = get_ticks();
77 return (unsigned long)(now >> 32) - base;
81 * For short delays only. It will overflow after a few seconds.
83 void __udelay(unsigned long usec)
89 base = sysreg_read(COUNT);
90 cycles = ((usec * (get_tbclk() / 10000)) + 50) / 100;
93 now = sysreg_read(COUNT);
94 } while ((now - base) < cycles);
97 static int set_interrupt_handler(unsigned int nr, void (*handler)(void),
98 unsigned int priority)
100 extern void _evba(void);
102 unsigned long handler_addr = (unsigned long)handler;
104 handler_addr -= (unsigned long)&_evba;
106 if ((handler_addr & HANDLER_MASK) != handler_addr
107 || (priority & INTLEV_MASK) != priority)
110 intpr = (handler_addr & HANDLER_MASK);
111 intpr |= (priority & INTLEV_MASK) << INTLEV_SHIFT;
112 writel(intpr, (void *)ATMEL_BASE_INTC + 4 * nr);
117 void timer_init(void)
119 extern void timer_interrupt_handler(void);
122 sysreg_write(COUNT, 0);
124 tmp = (u64)CONFIG_SYS_HZ << 32;
125 tmp += gd->cpu_hz / 2;
126 do_div(tmp, gd->cpu_hz);
127 tb_factor = (u32)tmp;
129 if (set_interrupt_handler(0, &timer_interrupt_handler, 3))
132 /* For all practical purposes, this gives us an overflow interrupt */
133 sysreg_write(COMPARE, 0xffffffff);