2 * serial.h - common serial defines for early debug and serial driver.
3 * any functions defined here must be always_inline since
4 * initcode cannot have function calls.
6 * Copyright (c) 2004-2007 Analog Devices Inc.
8 * Licensed under the GPL-2 or later.
11 #ifndef __BFIN_CPU_SERIAL_H__
12 #define __BFIN_CPU_SERIAL_H__
14 #include <asm/blackfin.h>
15 #include <asm/mach-common/bits/uart.h>
17 #ifndef CONFIG_UART_CONSOLE
18 # define CONFIG_UART_CONSOLE 0
21 #ifdef CONFIG_DEBUG_EARLY_SERIAL
22 # define BFIN_DEBUG_EARLY_SERIAL 1
24 # define BFIN_DEBUG_EARLY_SERIAL 0
29 #define LOB(x) ((x) & 0xFF)
30 #define HIB(x) (((x) >> 8) & 0xFF)
33 * All Blackfin system MMRs are padded to 32bits even if the register
34 * itself is only 16bits. So use a helper macro to streamline this.
36 #define __BFP(m) u16 m; u16 __pad_##m
37 struct bfin_mmr_serial {
76 # if (CONFIG_UART_CONSOLE == 3)
77 # define UART_BASE UART3_DLL
78 # elif (CONFIG_UART_CONSOLE == 2)
79 # define UART_BASE UART2_DLL
80 # elif (CONFIG_UART_CONSOLE == 1)
81 # define UART_BASE UART1_DLL
82 # elif (CONFIG_UART_CONSOLE == 0)
83 # define UART_BASE UART0_DLL
86 # if CONFIG_UART_CONSOLE != 0
87 # error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
89 # define UART_BASE UART_DLL
91 #define pUART ((volatile struct bfin_mmr_serial *)UART_BASE)
94 # define ACCESS_LATCH()
95 # define ACCESS_PORT_IER()
97 # define ACCESS_LATCH() \
98 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
99 # define ACCESS_PORT_IER() \
100 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
103 __attribute__((always_inline))
104 static inline void serial_do_portmux(void)
106 #if defined(__ADSPBF51x__)
107 # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
108 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
109 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
110 switch (CONFIG_UART_CONSOLE) {
111 case 0: DO_MUX(G, 5, 5, 9, 10); break; /* Port G; mux 5; PG9 and PG10 */
112 case 1: DO_MUX(F, 2, 3, 14, 15); break; /* Port H; mux 2/3; PH14 and PH15 */
115 #elif defined(__ADSPBF52x__)
116 # define DO_MUX(port, mux, tx, rx) \
117 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
118 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
119 switch (CONFIG_UART_CONSOLE) {
120 case 0: DO_MUX(G, 2, 7, 8); break; /* Port G; mux 2; PG2 and PG8 */
121 case 1: DO_MUX(F, 5, 14, 15); break; /* Port F; mux 5; PF14 and PF15 */
124 #elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
125 # define DO_MUX(func, tx, rx) \
126 bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~(func)); \
127 bfin_write_PORTF_FER(bfin_read_PORTF_FER() | PF##tx | PF##rx);
128 switch (CONFIG_UART_CONSOLE) {
129 case 0: DO_MUX(PFDE, 0, 1); break;
130 case 1: DO_MUX(PFTE, 2, 3); break;
133 #elif defined(__ADSPBF54x__)
134 # define DO_MUX(port, tx, rx) \
135 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
136 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
137 switch (CONFIG_UART_CONSOLE) {
138 case 0: DO_MUX(E, 7, 8); break; /* Port E; PE7 and PE8 */
139 case 1: DO_MUX(H, 0, 1); break; /* Port H; PH0 and PH1 */
140 case 2: DO_MUX(B, 4, 5); break; /* Port B; PB4 and PB5 */
141 case 3: DO_MUX(B, 6, 7); break; /* Port B; PB6 and PB7 */
147 __attribute__((always_inline))
148 static inline void serial_early_init(void)
150 /* handle portmux crap on different Blackfins */
153 /* always enable UART -- avoids anomalies 05000309 and 05000350 */
154 bfin_write16(&pUART->gctl, UCEN);
156 /* Set LCR to Word Lengh 8-bit word select */
157 bfin_write16(&pUART->lcr, WLS_8);
162 __attribute__((always_inline))
163 static inline void serial_early_put_div(uint16_t divisor)
165 /* Set DLAB in LCR to Access DLL and DLH */
169 /* Program the divisor to get the baud rate we want */
170 bfin_write16(&pUART->dll, LOB(divisor));
171 bfin_write16(&pUART->dlh, HIB(divisor));
174 /* Clear DLAB in LCR to Access THR RBR IER */
179 __attribute__((always_inline))
180 static inline uint16_t serial_early_get_div(void)
182 /* Set DLAB in LCR to Access DLL and DLH */
186 uint8_t dll = bfin_read16(&pUART->dll);
187 uint8_t dlh = bfin_read16(&pUART->dlh);
188 uint16_t divisor = (dlh << 8) | dll;
190 /* Clear DLAB in LCR to Access THR RBR IER */
197 /* We cannot use get_sclk() early on as it uses caches in external memory */
198 #if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
199 # define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
202 __attribute__((always_inline))
203 static inline void serial_early_set_baud(uint32_t baud)
205 /* Translate from baud into divisor in terms of SCLK. The
206 * weird multiplication is to make sure we over sample just
207 * a little rather than under sample the incoming signals.
209 serial_early_put_div((get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
212 #ifndef BFIN_IN_INITCODE
213 __attribute__((always_inline))
214 static inline void serial_early_puts(const char *s)
216 if (BFIN_DEBUG_EARLY_SERIAL) {
217 serial_puts("Early: ");
225 .macro serial_early_init
226 #ifdef CONFIG_DEBUG_EARLY_SERIAL
227 call _serial_initialize;
231 .macro serial_early_set_baud
232 #ifdef CONFIG_DEBUG_EARLY_SERIAL
233 R0.L = LO(CONFIG_BAUDRATE);
234 R0.H = HI(CONFIG_BAUDRATE);
235 call _serial_set_baud;
239 /* Since we embed the string right into our .text section, we need
240 * to find its address. We do this by getting our PC and adding 2
241 * bytes (which is the length of the jump instruction). Then we
242 * pass this address to serial_puts().
244 #ifdef CONFIG_DEBUG_EARLY_SERIAL
245 # define serial_early_puts(str) \
258 # define serial_early_puts(str)