1 // SPDX-License-Identifier: GPL-2.0+
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
11 volatile int *cf_icache_status = (int *)ICACHE_STATUS;
12 volatile int *cf_dcache_status = (int *)DCACHE_STATUS;
14 void flush_cache(ulong start_addr, ulong size)
16 /* Must be implemented for all M68k processors with copy-back data cache */
19 int icache_status(void)
21 return *cf_icache_status;
24 int dcache_status(void)
26 return *cf_dcache_status;
29 void icache_enable(void)
33 *cf_icache_status = 1;
35 #if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
36 __asm__ __volatile__("movec %0, %%acr2"::"r"(CONFIG_SYS_CACHE_ACR2));
37 __asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
38 #if defined(CONFIG_CF_V4E)
39 __asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
40 __asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
43 __asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
44 __asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
47 __asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_ICACR));
50 void icache_disable(void)
54 *cf_icache_status = 0;
57 #if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
58 __asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
59 __asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
60 #if defined(CONFIG_CF_V4E)
61 __asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
62 __asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
65 __asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
66 __asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
70 void icache_invalid(void)
74 temp = CONFIG_SYS_ICACHE_INV;
75 if (*cf_icache_status)
76 temp |= CONFIG_SYS_CACHE_ICACR;
78 __asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
82 * data cache only for ColdFire V4 such as MCF547x_8x, MCF5445x
83 * the dcache will be dummy in ColdFire V2 and V3
85 void dcache_enable(void)
88 *cf_dcache_status = 1;
90 #if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
91 __asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
92 __asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
93 #if defined(CONFIG_CF_V4E)
94 __asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
95 __asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
99 __asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_DCACR));
102 void dcache_disable(void)
106 *cf_dcache_status = 0;
109 __asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
111 #if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
112 __asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
113 __asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
114 #if defined(CONFIG_CF_V4E)
115 __asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
116 __asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
121 void dcache_invalid(void)
123 #if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
126 temp = CONFIG_SYS_DCACHE_INV;
127 if (*cf_dcache_status)
128 temp |= CONFIG_SYS_CACHE_DCACR;
129 if (*cf_icache_status)
130 temp |= CONFIG_SYS_CACHE_ICACR;
132 __asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
136 __weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
138 /* An empty stub, real implementation should be in platform code */
140 __weak void flush_dcache_range(unsigned long start, unsigned long stop)
142 /* An empty stub, real implementation should be in platform code */