2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_86xx.h>
11 #include <asm/fsl_serdes.h>
13 #define SRDS1_MAX_LANES 4
14 #define SRDS2_MAX_LANES 4
16 static u32 serdes1_prtcl_map, serdes2_prtcl_map;
18 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
19 [0x1] = {PCIE1, PCIE1, PCIE1, PCIE1},
20 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1},
21 [0x7] = {NONE, NONE, NONE, NONE},
24 static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
25 [0x0] = {PCIE2, PCIE2, PCIE2, PCIE2},
26 [0x4] = {PCIE2, PCIE2, PCIE2, PCIE2},
27 [0x7] = {NONE, NONE, NONE, NONE},
30 int is_serdes_configured(enum srds_prtcl device)
34 if (!(serdes1_prtcl_map & (1 << NONE)))
37 ret = (1 << device) & serdes1_prtcl_map;
42 if (!(serdes2_prtcl_map & (1 << NONE)))
45 return (1 << device) & serdes2_prtcl_map;
48 void fsl_serdes_init(void)
50 immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
51 ccsr_gur_t *gur = &immap->im_gur;
52 u32 pordevsr = in_be32(&gur->pordevsr);
53 u32 srds_cfg = (pordevsr & MPC8610_PORDEVSR_IO_SEL) >>
54 MPC8610_PORDEVSR_IO_SEL_SHIFT;
57 if (serdes1_prtcl_map & (1 << NONE) &&
58 serdes2_prtcl_map & (1 << NONE))
61 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
63 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
64 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
67 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
68 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
69 serdes1_prtcl_map |= (1 << lane_prtcl);
72 /* Set the first bit to indicate serdes has been initialized */
73 serdes1_prtcl_map |= (1 << NONE);
75 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
76 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
80 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
81 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
82 serdes2_prtcl_map |= (1 << lane_prtcl);
85 /* Set the first bit to indicate serdes has been initialized */
86 serdes2_prtcl_map |= (1 << NONE);