2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
9 #include <asm/config_mpc85xx.h>
11 #ifdef CONFIG_SECURE_BOOT
12 #define CONFIG_CMD_ESBC_VALIDATE
13 #define CONFIG_FSL_SEC_MON
14 #define CONFIG_SHA_PROG_HW_ACCEL
17 #define CONFIG_RSA_FREESCALE_EXP
18 #ifndef CONFIG_FSL_CAAM
19 #define CONFIG_FSL_CAAM
23 #ifdef CONFIG_SECURE_BOOT
24 #if defined(CONFIG_FSL_CORENET)
25 #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
26 #elif defined(CONFIG_BSC9132QDS)
27 #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
28 #elif defined(CONFIG_C29XPCIE)
29 #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
31 #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
33 #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
35 #if defined(CONFIG_B4860QDS) || \
36 defined(CONFIG_T4240QDS) || \
37 defined(CONFIG_T2080QDS) || \
38 defined(CONFIG_T2080RDB) || \
39 defined(CONFIG_T1040QDS) || \
40 defined(CONFIG_T104xD4QDS) || \
41 defined(CONFIG_T104xRDB) || \
42 defined(CONFIG_T104xD4RDB) || \
43 defined(CONFIG_PPC_T1023) || \
44 defined(CONFIG_PPC_T1024)
45 #define CONFIG_SYS_CPC_REINIT_F
46 #define CONFIG_KEY_REVOCATION
47 #undef CONFIG_SYS_INIT_L3_ADDR
48 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
51 #if defined(CONFIG_C29XPCIE)
52 #define CONFIG_KEY_REVOCATION
55 #if defined(CONFIG_PPC_P3041) || \
56 defined(CONFIG_PPC_P4080) || \
57 defined(CONFIG_PPC_P5020) || \
58 defined(CONFIG_PPC_P5040) || \
59 defined(CONFIG_PPC_P2041)
60 #define CONFIG_FSL_TRUST_ARCH_v1
63 #if defined(CONFIG_FSL_CORENET)
64 /* The key used for verification of next level images
65 * is picked up from an Extension Table which has
66 * been verified by the ISBC (Internal Secure boot Code)
67 * in boot ROM of the SoC
69 #define CONFIG_FSL_ISBC_KEY_EXT
72 #ifndef CONFIG_FIT_SIGNATURE
73 /* The bootscript header address is different for B4860 because the NOR
74 * mapping is different on B4 due to reduced NOR size.
76 #if defined(CONFIG_B4860QDS)
77 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000
78 #elif defined(CONFIG_FSL_CORENET)
79 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000
80 #elif defined(CONFIG_BSC9132QDS)
81 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000
82 #elif defined(CONFIG_C29XPCIE)
83 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000
85 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000
88 #include <config_fsl_secboot.h>