2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
61 QSGMII_FM1_A, /* A indicates MACs 1-4 */
62 QSGMII_FM1_B, /* B indicates MACs 5,6,9,10 */
72 QSGMII_SW1_A, /* Indicates ports on L2 Switch */
83 int is_serdes_configured(enum srds_prtcl device);
84 void fsl_serdes_init(void);
85 const char *serdes_clock_to_string(u32 clock);
87 #ifdef CONFIG_FSL_CORENET
88 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
89 int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
90 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
92 int serdes_get_first_lane(enum srds_prtcl device);
94 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
95 void serdes_reset_rx(enum srds_prtcl device);
99 #endif /* __FSL_SERDES_H */