git.sur5r.net Git - u-boot/blob - arch/x86/cpu/irq.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   4  */
   5
   6 #include <common.h>
   7 #include <dm.h>
   8 #include <errno.h>
   9 #include <fdtdec.h>
  10 #include <malloc.h>
  11 #include <asm/io.h>
  12 #include <asm/irq.h>
  13 #include <asm/pci.h>
  14 #include <asm/pirq_routing.h>
  15 #include <asm/tables.h>
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
  20 {
  21         struct irq_router *priv = dev_get_priv(dev);
  22         u8 pirq;
  23         int base = priv->link_base;
  24
  25         if (priv->config == PIRQ_VIA_PCI)
  26                 dm_pci_read_config8(dev->parent,
  27                                     pirq_linkno_to_reg(link, base), &pirq);
  28         else
  29                 pirq = readb((uintptr_t)priv->ibase +
  30                              pirq_linkno_to_reg(link, base));
  31
  32         pirq &= 0xf;
  33
  34         /* IRQ# 0/1/2/8/13 are reserved */
  35         if (pirq < 3 || pirq == 8 || pirq == 13)
  36                 return false;
  37
  38         return pirq == irq ? true : false;
  39 }
  40
  41 int pirq_translate_link(struct udevice *dev, int link)
  42 {
  43         struct irq_router *priv = dev_get_priv(dev);
  44
  45         return pirq_reg_to_linkno(link, priv->link_base);
  46 }
  47
  48 void pirq_assign_irq(struct udevice *dev, int link, u8 irq)
  49 {
  50         struct irq_router *priv = dev_get_priv(dev);
  51         int base = priv->link_base;
  52
  53         /* IRQ# 0/1/2/8/13 are reserved */
  54         if (irq < 3 || irq == 8 || irq == 13)
  55                 return;
  56
  57         if (priv->config == PIRQ_VIA_PCI)
  58                 dm_pci_write_config8(dev->parent,
  59                                      pirq_linkno_to_reg(link, base), irq);
  60         else
  61                 writeb(irq, (uintptr_t)priv->ibase +
  62                        pirq_linkno_to_reg(link, base));
  63 }
  64
  65 static struct irq_info *check_dup_entry(struct irq_info *slot_base,
  66                                         int entry_num, int bus, int device)
  67 {
  68         struct irq_info *slot = slot_base;
  69         int i;
  70
  71         for (i = 0; i < entry_num; i++) {
  72                 if (slot->bus == bus && slot->devfn == (device << 3))
  73                         break;
  74                 slot++;
  75         }
  76
  77         return (i == entry_num) ? NULL : slot;
  78 }
  79
  80 static inline void fill_irq_info(struct irq_router *priv, struct irq_info *slot,
  81                                  int bus, int device, int pin, int pirq)
  82 {
  83         slot->bus = bus;
  84         slot->devfn = (device << 3) | 0;
  85         slot->irq[pin - 1].link = pirq_linkno_to_reg(pirq, priv->link_base);
  86         slot->irq[pin - 1].bitmap = priv->irq_mask;
  87 }
  88
  89 static int create_pirq_routing_table(struct udevice *dev)
  90 {
  91         struct irq_router *priv = dev_get_priv(dev);
  92         const void *blob = gd->fdt_blob;
  93         int node;
  94         int len, count;
  95         const u32 *cell;
  96         struct irq_routing_table *rt;
  97         struct irq_info *slot, *slot_base;
  98         int irq_entries = 0;
  99         int i;
 100         int ret;
 101
 102         node = dev_of_offset(dev);
 103
 104         /* extract the bdf from fdt_pci_addr */
 105         priv->bdf = dm_pci_get_bdf(dev->parent);
 106
 107         ret = fdt_stringlist_search(blob, node, "intel,pirq-config", "pci");
 108         if (!ret) {
 109                 priv->config = PIRQ_VIA_PCI;
 110         } else {
 111                 ret = fdt_stringlist_search(blob, node, "intel,pirq-config",
 112                                             "ibase");
 113                 if (!ret)
 114                         priv->config = PIRQ_VIA_IBASE;
 115                 else
 116                         return -EINVAL;
 117         }
 118
 119         ret = fdtdec_get_int(blob, node, "intel,pirq-link", -1);
 120         if (ret == -1)
 121                 return ret;
 122         priv->link_base = ret;
 123
 124         priv->irq_mask = fdtdec_get_int(blob, node,
 125                                         "intel,pirq-mask", PIRQ_BITMAP);
 126
 127         if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
 128                 /* Reserve IRQ9 for SCI */
 129                 priv->irq_mask &= ~(1 << 9);
 130         }
 131
 132         if (priv->config == PIRQ_VIA_IBASE) {
 133                 int ibase_off;
 134
 135                 ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0);
 136                 if (!ibase_off)
 137                         return -EINVAL;
 138
 139                 /*
 140                  * Here we assume that the IBASE register has already been
 141                  * properly configured by U-Boot before.
 142                  *
 143                  * By 'valid' we mean:
 144                  *   1) a valid memory space carved within system memory space
 145                  *      assigned to IBASE register block.
 146                  *   2) memory range decoding is enabled.
 147                  * Hence we don't do any santify test here.
 148                  */
 149                 dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase);
 150                 priv->ibase &= ~0xf;
 151         }
 152
 153         priv->actl_8bit = fdtdec_get_bool(blob, node, "intel,actl-8bit");
 154         priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr", 0);
 155
 156         cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
 157         if (!cell || len % sizeof(struct pirq_routing))
 158                 return -EINVAL;
 159         count = len / sizeof(struct pirq_routing);
 160
 161         rt = calloc(1, sizeof(struct irq_routing_table));
 162         if (!rt)
 163                 return -ENOMEM;
 164
 165         /* Populate the PIRQ table fields */
 166         rt->signature = PIRQ_SIGNATURE;
 167         rt->version = PIRQ_VERSION;
 168         rt->rtr_bus = PCI_BUS(priv->bdf);
 169         rt->rtr_devfn = (PCI_DEV(priv->bdf) << 3) | PCI_FUNC(priv->bdf);
 170         rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
 171         rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
 172
 173         slot_base = rt->slots;
 174
 175         /* Now fill in the irq_info entries in the PIRQ table */
 176         for (i = 0; i < count;
 177              i++, cell += sizeof(struct pirq_routing) / sizeof(u32)) {
 178                 struct pirq_routing pr;
 179
 180                 pr.bdf = fdt_addr_to_cpu(cell[0]);
 181                 pr.pin = fdt_addr_to_cpu(cell[1]);
 182                 pr.pirq = fdt_addr_to_cpu(cell[2]);
 183
 184                 debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n",
 185                       i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
 186                       PCI_FUNC(pr.bdf), 'A' + pr.pin - 1,
 187                       'A' + pr.pirq);
 188
 189                 slot = check_dup_entry(slot_base, irq_entries,
 190                                        PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
 191                 if (slot) {
 192                         debug("found entry for bus %d device %d, ",
 193                               PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
 194
 195                         if (slot->irq[pr.pin - 1].link) {
 196                                 debug("skipping\n");
 197
 198                                 /*
 199                                  * Sanity test on the routed PIRQ pin
 200                                  *
 201                                  * If they don't match, show a warning to tell
 202                                  * there might be something wrong with the PIRQ
 203                                  * routing information in the device tree.
 204                                  */
 205                                 if (slot->irq[pr.pin - 1].link !=
 206                                     pirq_linkno_to_reg(pr.pirq, priv->link_base))
 207                                         debug("WARNING: Inconsistent PIRQ routing information\n");
 208                                 continue;
 209                         }
 210                 } else {
 211                         slot = slot_base + irq_entries++;
 212                 }
 213                 debug("writing INT%c\n", 'A' + pr.pin - 1);
 214                 fill_irq_info(priv, slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
 215                               pr.pin, pr.pirq);
 216         }
 217
 218         rt->size = irq_entries * sizeof(struct irq_info) + 32;
 219
 220         /* Fix up the table checksum */
 221         rt->checksum = table_compute_checksum(rt, rt->size);
 222
 223         gd->arch.pirq_routing_table = rt;
 224
 225         return 0;
 226 }
 227
 228 static void irq_enable_sci(struct udevice *dev)
 229 {
 230         struct irq_router *priv = dev_get_priv(dev);
 231
 232         if (priv->actl_8bit) {
 233                 /* Bit7 must be turned on to enable ACPI */
 234                 dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80);
 235         } else {
 236                 /* Write 0 to enable SCI on IRQ9 */
 237                 if (priv->config == PIRQ_VIA_PCI)
 238                         dm_pci_write_config32(dev->parent, priv->actl_addr, 0);
 239                 else
 240                         writel(0, (uintptr_t)priv->ibase + priv->actl_addr);
 241         }
 242 }
 243
 244 int irq_router_probe(struct udevice *dev)
 245 {
 246         int ret;
 247
 248         ret = create_pirq_routing_table(dev);
 249         if (ret) {
 250                 debug("Failed to create pirq routing table\n");
 251                 return ret;
 252         }
 253         /* Route PIRQ */
 254         pirq_route_irqs(dev, gd->arch.pirq_routing_table->slots,
 255                         get_irq_slot_count(gd->arch.pirq_routing_table));
 256
 257         if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE))
 258                 irq_enable_sci(dev);
 259
 260         return 0;
 261 }
 262
 263 ulong write_pirq_routing_table(ulong addr)
 264 {
 265         if (!gd->arch.pirq_routing_table)
 266                 return addr;
 267
 268         return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
 269 }
 270
 271 static const struct udevice_id irq_router_ids[] = {
 272         { .compatible = "intel,irq-router" },
 273         { }
 274 };
 275
 276 U_BOOT_DRIVER(irq_router_drv) = {
 277         .name           = "intel_irq",
 278         .id             = UCLASS_IRQ,
 279         .of_match       = irq_router_ids,
 280         .probe          = irq_router_probe,
 281         .priv_auto_alloc_size = sizeof(struct irq_router),
 282 };
 283
 284 UCLASS_DRIVER(irq) = {
 285         .id             = UCLASS_IRQ,
 286         .name           = "irq",
 287 };