3 #include <dt-bindings/gpio/x86-gpio.h>
5 /include/ "skeleton.dtsi"
6 /include/ "keyboard.dtsi"
7 /include/ "serial.dtsi"
9 /include/ "tsc_timer.dtsi"
10 /include/ "coreboot_fb.dtsi"
13 model = "Google Link";
14 compatible = "google,link", "intel,celeron-ivybridge";
32 compatible = "intel,core-gen3";
39 compatible = "intel,core-gen3";
46 compatible = "intel,core-gen3";
53 compatible = "intel,core-gen3";
61 stdout-path = "/serial";
69 compatible = "intel,x86-pinctrl";
76 direction = <PIN_INPUT>;
82 direction = <PIN_OUTPUT>;
89 direction = <PIN_INPUT>;
95 direction = <PIN_INPUT>;
101 direction = <PIN_OUTPUT>;
108 direction = <PIN_INPUT>;
115 direction = <PIN_INPUT>;
122 direction = <PIN_INPUT>;
127 gpio-offset = <0 10>;
129 direction = <PIN_INPUT>;
133 gpio-offset = <0 11>;
135 direction = <PIN_INPUT>;
139 gpio-offset = <0 12>;
141 direction = <PIN_INPUT>;
146 gpio-offset = <0 14>;
148 direction = <PIN_INPUT>;
153 gpio-offset = <0 15>;
155 direction = <PIN_INPUT>;
160 gpio-offset = <0 21>;
162 direction = <PIN_INPUT>;
166 gpio-offset = <0 24>;
169 direction = <PIN_OUTPUT>;
173 gpio-offset = <0 28>;
175 direction = <PIN_INPUT>;
179 gpio-offset = <0x30 4>;
181 direction = <PIN_OUTPUT>;
187 gpio-offset = <0x30 9>;
189 direction = <PIN_INPUT>;
194 gpio-offset = <0x30 10>;
196 direction = <PIN_INPUT>;
201 gpio-offset = <0x30 11>;
203 direction = <PIN_INPUT>;
207 gpio-offset = <0x30 25>;
209 direction = <PIN_INPUT>;
213 gpio-offset = <0x30 28>;
215 direction = <PIN_OUTPUT>;
222 compatible = "pci-x86";
223 #address-cells = <3>;
226 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
227 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
228 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
231 reg = <0x00000000 0 0 0 0>;
233 compatible = "intel,bd82x6x-northbridge";
234 board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
235 <&gpio_b 11 0>, <&gpio_a 10 0>;
238 #address-cells = <1>;
240 elpida_4Gb_1600_x16 {
243 data = [92 10 0b 03 04 19 02 02
244 03 52 01 08 0a 00 fe 00
245 69 78 69 3c 69 11 18 81
246 20 08 3c 3c 01 40 83 81
247 00 00 00 00 00 00 00 00
248 00 00 00 00 00 00 00 00
249 00 00 00 00 00 00 00 00
250 00 00 00 00 0f 11 42 00
251 00 00 00 00 00 00 00 00
252 00 00 00 00 00 00 00 00
253 00 00 00 00 00 00 00 00
254 00 00 00 00 00 00 00 00
255 00 00 00 00 00 00 00 00
256 00 00 00 00 00 00 00 00
257 00 00 00 00 00 02 fe 00
258 11 52 00 00 00 07 7f 37
259 45 42 4a 32 30 55 47 36
260 45 42 55 30 2d 47 4e 2d
261 46 20 30 20 02 fe 00 00
262 00 00 00 00 00 00 00 00
263 00 00 00 00 00 00 00 00
264 00 00 00 00 00 00 00 00
265 00 00 00 00 00 00 00 00
266 00 00 00 00 00 00 00 00
267 00 00 00 00 00 00 00 00
268 00 00 00 00 00 00 00 00
269 00 00 00 00 00 00 00 00
270 00 00 00 00 00 00 00 00
271 00 00 00 00 00 00 00 00
272 00 00 00 00 00 00 00 00
273 00 00 00 00 00 00 00 00
274 00 00 00 00 00 00 00 00];
276 samsung_4Gb_1600_1.35v_x16 {
279 data = [92 11 0b 03 04 19 02 02
280 03 11 01 08 0a 00 fe 00
281 69 78 69 3c 69 11 18 81
282 f0 0a 3c 3c 01 40 83 01
283 00 80 00 00 00 00 00 00
284 00 00 00 00 00 00 00 00
285 00 00 00 00 00 00 00 00
286 00 00 00 00 0f 11 02 00
287 00 00 00 00 00 00 00 00
288 00 00 00 00 00 00 00 00
289 00 00 00 00 00 00 00 00
290 00 00 00 00 00 00 00 00
291 00 00 00 00 00 00 00 00
292 00 00 00 00 00 00 00 00
293 00 00 00 00 00 80 ce 01
294 00 00 00 00 00 00 6a 04
295 4d 34 37 31 42 35 36 37
296 34 42 48 30 2d 59 4b 30
297 20 20 00 00 80 ce 00 00
298 00 00 00 00 00 00 00 00
299 00 00 00 00 00 00 00 00
300 00 00 00 00 00 00 00 00
301 00 00 00 00 00 00 00 00
302 00 00 00 00 00 00 00 00
303 00 00 00 00 00 00 00 00
304 00 00 00 00 00 00 00 00
305 00 00 00 00 00 00 00 00
306 00 00 00 00 00 00 00 00
307 00 00 00 00 00 00 00 00
308 00 00 00 00 00 00 00 00
309 00 00 00 00 00 00 00 00
310 00 00 00 00 00 00 00 00];
312 micron_4Gb_1600_1.35v_x16 {
314 data = [92 11 0b 03 04 19 02 02
315 03 11 01 08 0a 00 fe 00
316 69 78 69 3c 69 11 18 81
317 20 08 3c 3c 01 40 83 05
318 00 00 00 00 00 00 00 00
319 00 00 00 00 00 00 00 00
320 00 00 00 00 00 00 00 00
321 00 00 00 00 0f 01 02 00
322 00 00 00 00 00 00 00 00
323 00 00 00 00 00 00 00 00
324 00 00 00 00 00 00 00 00
325 00 00 00 00 00 00 00 00
326 00 00 00 00 00 00 00 00
327 00 00 00 00 00 00 00 00
328 00 00 00 00 00 80 2c 00
329 00 00 00 00 00 00 ad 75
330 34 4b 54 46 32 35 36 36
331 34 48 5a 2d 31 47 36 45
332 31 20 45 31 80 2c 00 00
333 00 00 00 00 00 00 00 00
334 00 00 00 00 00 00 00 00
335 00 00 00 00 00 00 00 00
336 ff ff ff ff ff ff ff ff
337 ff ff ff ff ff ff ff ff
338 ff ff ff ff ff ff ff ff
339 ff ff ff ff ff ff ff ff
340 ff ff ff ff ff ff ff ff
341 ff ff ff ff ff ff ff ff
342 ff ff ff ff ff ff ff ff
343 ff ff ff ff ff ff ff ff
344 ff ff ff ff ff ff ff ff
345 ff ff ff ff ff ff ff ff];
351 reg = <0x00001000 0 0 0 0>;
352 compatible = "intel,gma";
353 intel,dp_hotplug = <0 0 0x06>;
354 intel,panel-port-select = <1>;
355 intel,panel-power-cycle-delay = <6>;
356 intel,panel-power-up-delay = <2000>;
357 intel,panel-power-down-delay = <500>;
358 intel,panel-power-backlight-on-delay = <2000>;
359 intel,panel-power-backlight-off-delay = <2000>;
360 intel,cpu-backlight = <0x00000200>;
361 intel,pch-backlight = <0x04000000>;
365 reg = <0x0000b000 0 0 0 0>;
366 compatible = "intel,me";
371 reg = <0x0000d000 0 0 0 0>;
372 compatible = "ehci-pci";
376 reg = <0x0000e800 0 0 0 0>;
377 compatible = "ehci-pci";
381 reg = <0x0000f800 0 0 0 0>;
382 compatible = "intel,bd82x6x", "intel,pch9";
384 #address-cells = <1>;
386 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
387 0x80 0x80 0x80 0x80>;
388 intel,gpi-routing = <0 0 0 0 0 0 0 2
390 /* Enable EC SMI source */
391 intel,alt-gp-smi-enable = <0x0100>;
394 #address-cells = <1>;
396 compatible = "intel,ich9-spi";
400 #address-cells = <1>;
403 compatible = "winbond,w25q64",
405 memory-map = <0xff800000 0x00800000>;
407 label = "rw-mrc-cache";
408 reg = <0x003e0000 0x00010000>;
415 compatible = "intel,ich6-gpio";
424 compatible = "intel,ich6-gpio";
433 compatible = "intel,ich6-gpio";
442 compatible = "intel,bd82x6x-lpc";
443 #address-cells = <1>;
446 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
448 compatible = "google,cros-ec";
449 reg = <0x204 1 0x200 1 0x880 0x80>;
452 * Describes the flash memory within
455 #address-cells = <1>;
458 reg = <0x08000000 0x20000>;
459 erase-value = <0xff>;
466 compatible = "intel,pantherpoint-ahci";
467 reg = <0x0000fa00 0 0 0 0>;
469 intel,sata-mode = "ahci";
470 intel,sata-port-map = <1>;
471 intel,sata-port0-gen3-tx = <0x00880a7f>;
475 compatible = "intel,ich-i2c";
476 reg = <0x0000fb00 0 0 0 0>;
482 reg = <0xfed40000 0x5000>;
483 compatible = "infineon,slb9635lpc";
490 #include "microcode/m12306a9_0000001b.dtsi"