git.sur5r.net Git - u-boot/blob - arch/x86/dts/chromebook_link.dts

   1 /dts-v1/;
   2
   3 /include/ "skeleton.dtsi"
   4 /include/ "keyboard.dtsi"
   5 /include/ "serial.dtsi"
   6 /include/ "rtc.dtsi"
   7 /include/ "tsc_timer.dtsi"
   8
   9 / {
  10         model = "Google Link";
  11         compatible = "google,link", "intel,celeron-ivybridge";
  12
  13         aliases {
  14                 spi0 = "/pci/pch/spi";
  15         };
  16
  17         config {
  18                silent_console = <0>;
  19         };
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "intel,core-gen3";
  28                         reg = <0>;
  29                         intel,apic-id = <0>;
  30                 };
  31
  32                 cpu@1 {
  33                         device_type = "cpu";
  34                         compatible = "intel,core-gen3";
  35                         reg = <1>;
  36                         intel,apic-id = <1>;
  37                 };
  38
  39                 cpu@2 {
  40                         device_type = "cpu";
  41                         compatible = "intel,core-gen3";
  42                         reg = <2>;
  43                         intel,apic-id = <2>;
  44                 };
  45
  46                 cpu@3 {
  47                         device_type = "cpu";
  48                         compatible = "intel,core-gen3";
  49                         reg = <3>;
  50                         intel,apic-id = <3>;
  51                 };
  52
  53         };
  54
  55         gpioa {
  56                 compatible = "intel,ich6-gpio";
  57                 u-boot,dm-pre-reloc;
  58                 reg = <0 0x10>;
  59                 bank-name = "A";
  60         };
  61
  62         gpiob {
  63                 compatible = "intel,ich6-gpio";
  64                 u-boot,dm-pre-reloc;
  65                 reg = <0x30 0x10>;
  66                 bank-name = "B";
  67         };
  68
  69         gpioc {
  70                 compatible = "intel,ich6-gpio";
  71                 u-boot,dm-pre-reloc;
  72                 reg = <0x40 0x10>;
  73                 bank-name = "C";
  74         };
  75
  76         chosen {
  77                 stdout-path = "/serial";
  78         };
  79
  80         keyboard {
  81                 intel,duplicate-por;
  82         };
  83
  84         spd {
  85                 compatible = "memory-spd";
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 elpida_4Gb_1600_x16 {
  89                         reg = <0>;
  90                         data = [92 10 0b 03 04 19 02 02
  91                                 03 52 01 08 0a 00 fe 00
  92                                 69 78 69 3c 69 11 18 81
  93                                 20 08 3c 3c 01 40 83 81
  94                                 00 00 00 00 00 00 00 00
  95                                 00 00 00 00 00 00 00 00
  96                                 00 00 00 00 00 00 00 00
  97                                 00 00 00 00 0f 11 42 00
  98                                 00 00 00 00 00 00 00 00
  99                                 00 00 00 00 00 00 00 00
 100                                 00 00 00 00 00 00 00 00
 101                                 00 00 00 00 00 00 00 00
 102                                 00 00 00 00 00 00 00 00
 103                                 00 00 00 00 00 00 00 00
 104                                 00 00 00 00 00 02 fe 00
 105                                 11 52 00 00 00 07 7f 37
 106                                 45 42 4a 32 30 55 47 36
 107                                 45 42 55 30 2d 47 4e 2d
 108                                 46 20 30 20 02 fe 00 00
 109                                 00 00 00 00 00 00 00 00
 110                                 00 00 00 00 00 00 00 00
 111                                 00 00 00 00 00 00 00 00
 112                                 00 00 00 00 00 00 00 00
 113                                 00 00 00 00 00 00 00 00
 114                                 00 00 00 00 00 00 00 00
 115                                 00 00 00 00 00 00 00 00
 116                                 00 00 00 00 00 00 00 00
 117                                 00 00 00 00 00 00 00 00
 118                                 00 00 00 00 00 00 00 00
 119                                 00 00 00 00 00 00 00 00
 120                                 00 00 00 00 00 00 00 00
 121                                 00 00 00 00 00 00 00 00];
 122                 };
 123                 samsung_4Gb_1600_1.35v_x16 {
 124                         reg = <1>;
 125                         data = [92 11 0b 03 04 19 02 02
 126                                 03 11 01 08 0a 00 fe 00
 127                                 69 78 69 3c 69 11 18 81
 128                                 f0 0a 3c 3c 01 40 83 01
 129                                 00 80 00 00 00 00 00 00
 130                                 00 00 00 00 00 00 00 00
 131                                 00 00 00 00 00 00 00 00
 132                                 00 00 00 00 0f 11 02 00
 133                                 00 00 00 00 00 00 00 00
 134                                 00 00 00 00 00 00 00 00
 135                                 00 00 00 00 00 00 00 00
 136                                 00 00 00 00 00 00 00 00
 137                                 00 00 00 00 00 00 00 00
 138                                 00 00 00 00 00 00 00 00
 139                                 00 00 00 00 00 80 ce 01
 140                                 00 00 00 00 00 00 6a 04
 141                                 4d 34 37 31 42 35 36 37
 142                                 34 42 48 30 2d 59 4b 30
 143                                 20 20 00 00 80 ce 00 00
 144                                 00 00 00 00 00 00 00 00
 145                                 00 00 00 00 00 00 00 00
 146                                 00 00 00 00 00 00 00 00
 147                                 00 00 00 00 00 00 00 00
 148                                 00 00 00 00 00 00 00 00
 149                                 00 00 00 00 00 00 00 00
 150                                 00 00 00 00 00 00 00 00
 151                                 00 00 00 00 00 00 00 00
 152                                 00 00 00 00 00 00 00 00
 153                                 00 00 00 00 00 00 00 00
 154                                 00 00 00 00 00 00 00 00
 155                                 00 00 00 00 00 00 00 00
 156                                 00 00 00 00 00 00 00 00];
 157                         };
 158                 micron_4Gb_1600_1.35v_x16 {
 159                         reg = <2>;
 160                         data = [92 11 0b 03 04 19 02 02
 161                                 03 11 01 08 0a 00 fe 00
 162                                 69 78 69 3c 69 11 18 81
 163                                 20 08 3c 3c 01 40 83 05
 164                                 00 00 00 00 00 00 00 00
 165                                 00 00 00 00 00 00 00 00
 166                                 00 00 00 00 00 00 00 00
 167                                 00 00 00 00 0f 01 02 00
 168                                 00 00 00 00 00 00 00 00
 169                                 00 00 00 00 00 00 00 00
 170                                 00 00 00 00 00 00 00 00
 171                                 00 00 00 00 00 00 00 00
 172                                 00 00 00 00 00 00 00 00
 173                                 00 00 00 00 00 00 00 00
 174                                 00 00 00 00 00 80 2c 00
 175                                 00 00 00 00 00 00 ad 75
 176                                 34 4b 54 46 32 35 36 36
 177                                 34 48 5a 2d 31 47 36 45
 178                                 31 20 45 31 80 2c 00 00
 179                                 00 00 00 00 00 00 00 00
 180                                 00 00 00 00 00 00 00 00
 181                                 00 00 00 00 00 00 00 00
 182                                 ff ff ff ff ff ff ff ff
 183                                 ff ff ff ff ff ff ff ff
 184                                 ff ff ff ff ff ff ff ff
 185                                 ff ff ff ff ff ff ff ff
 186                                 ff ff ff ff ff ff ff ff
 187                                 ff ff ff ff ff ff ff ff
 188                                 ff ff ff ff ff ff ff ff
 189                                 ff ff ff ff ff ff ff ff
 190                                 ff ff ff ff ff ff ff ff
 191                                 ff ff ff ff ff ff ff ff];
 192                 };
 193         };
 194
 195         pci {
 196                 compatible = "pci-x86";
 197                 #address-cells = <3>;
 198                 #size-cells = <2>;
 199                 u-boot,dm-pre-reloc;
 200                 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
 201                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
 202                         0x01000000 0x0 0x1000 0x1000 0 0xefff>;
 203
 204                 northbridge@0,0 {
 205                         reg = <0x00000000 0 0 0 0>;
 206                         compatible = "intel,bd82x6x-northbridge";
 207                         u-boot,dm-pre-reloc;
 208                 };
 209
 210                 gma {
 211                         compatible = "intel,gma";
 212                         intel,dp_hotplug = <0 0 0x06>;
 213                         intel,panel-port-select = <1>;
 214                         intel,panel-power-cycle-delay = <6>;
 215                         intel,panel-power-up-delay = <2000>;
 216                         intel,panel-power-down-delay = <500>;
 217                         intel,panel-power-backlight-on-delay = <2000>;
 218                         intel,panel-power-backlight-off-delay = <2000>;
 219                         intel,cpu-backlight = <0x00000200>;
 220                         intel,pch-backlight = <0x04000000>;
 221                 };
 222
 223                 me@16,0 {
 224                         reg = <0x0000b000 0 0 0 0>;
 225                         compatible = "intel,me";
 226                         u-boot,dm-pre-reloc;
 227                 };
 228
 229                 pch@1f,0 {
 230                         reg = <0x0000f800 0 0 0 0>;
 231                         compatible = "intel,bd82x6x", "intel,pch9";
 232                         u-boot,dm-pre-reloc;
 233                         #address-cells = <1>;
 234                         #size-cells = <1>;
 235                         intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
 236                                                 0x80 0x80 0x80 0x80>;
 237                         intel,gpi-routing = <0 0 0 0 0 0 0 2
 238                                                 1 0 0 0 0 0 0 0>;
 239                         /* Enable EC SMI source */
 240                         intel,alt-gp-smi-enable = <0x0100>;
 241
 242                         spi {
 243                                 #address-cells = <1>;
 244                                 #size-cells = <0>;
 245                                 compatible = "intel,ich-spi";
 246                                 spi-flash@0 {
 247                                         #size-cells = <1>;
 248                                         #address-cells = <1>;
 249                                         reg = <0>;
 250                                         compatible = "winbond,w25q64",
 251                                                         "spi-flash";
 252                                         memory-map = <0xff800000 0x00800000>;
 253                                         rw-mrc-cache {
 254                                                 label = "rw-mrc-cache";
 255                                                 reg = <0x003e0000 0x00010000>;
 256                                         };
 257                                 };
 258                         };
 259
 260                         lpc {
 261                                 compatible = "intel,bd82x6x-lpc";
 262                                 #address-cells = <1>;
 263                                 #size-cells = <0>;
 264                                 u-boot,dm-pre-reloc;
 265                                 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
 266                                 cros-ec@200 {
 267                                         compatible = "google,cros-ec";
 268                                         reg = <0x204 1 0x200 1 0x880 0x80>;
 269
 270                                         /*
 271                                          * Describes the flash memory within
 272                                          * the EC
 273                                          */
 274                                         #address-cells = <1>;
 275                                         #size-cells = <1>;
 276                                         flash@8000000 {
 277                                                 reg = <0x08000000 0x20000>;
 278                                                 erase-value = <0xff>;
 279                                         };
 280                                 };
 281                         };
 282                 };
 283
 284                 sata@1f,2 {
 285                         compatible = "intel,pantherpoint-ahci";
 286                         reg = <0x0000fa00 0 0 0 0>;
 287                         u-boot,dm-pre-reloc;
 288                         intel,sata-mode = "ahci";
 289                         intel,sata-port-map = <1>;
 290                         intel,sata-port0-gen3-tx = <0x00880a7f>;
 291                 };
 292
 293                 smbus: smbus@1f,3 {
 294                         compatible = "intel,ich-i2c";
 295                         reg = <0x0000fb00 0 0 0 0>;
 296                         u-boot,dm-pre-reloc;
 297                 };
 298         };
 299
 300         tpm {
 301                 reg = <0xfed40000 0x5000>;
 302                 compatible = "infineon,slb9635lpc";
 303         };
 304
 305         microcode {
 306                 update@0 {
 307 #include "microcode/m12306a9_0000001b.dtsi"
 308                 };
 309         };
 310
 311 };