3 /include/ "skeleton.dtsi"
4 /include/ "serial.dtsi"
8 compatible = "google,link", "intel,celeron-ivybridge";
19 compatible = "intel,ich6-gpio";
26 compatible = "intel,ich6-gpio";
33 compatible = "intel,ich6-gpio";
40 stdout-path = "/serial";
44 compatible = "memory-spd";
49 data = [92 10 0b 03 04 19 02 02
50 03 52 01 08 0a 00 fe 00
51 69 78 69 3c 69 11 18 81
52 20 08 3c 3c 01 40 83 81
53 00 00 00 00 00 00 00 00
54 00 00 00 00 00 00 00 00
55 00 00 00 00 00 00 00 00
56 00 00 00 00 0f 11 42 00
57 00 00 00 00 00 00 00 00
58 00 00 00 00 00 00 00 00
59 00 00 00 00 00 00 00 00
60 00 00 00 00 00 00 00 00
61 00 00 00 00 00 00 00 00
62 00 00 00 00 00 00 00 00
63 00 00 00 00 00 02 fe 00
64 11 52 00 00 00 07 7f 37
65 45 42 4a 32 30 55 47 36
66 45 42 55 30 2d 47 4e 2d
67 46 20 30 20 02 fe 00 00
68 00 00 00 00 00 00 00 00
69 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00
71 00 00 00 00 00 00 00 00
72 00 00 00 00 00 00 00 00
73 00 00 00 00 00 00 00 00
74 00 00 00 00 00 00 00 00
75 00 00 00 00 00 00 00 00
76 00 00 00 00 00 00 00 00
77 00 00 00 00 00 00 00 00
78 00 00 00 00 00 00 00 00
79 00 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00];
82 samsung_4Gb_1600_1.35v_x16 {
84 data = [92 11 0b 03 04 19 02 02
85 03 11 01 08 0a 00 fe 00
86 69 78 69 3c 69 11 18 81
87 f0 0a 3c 3c 01 40 83 01
88 00 80 00 00 00 00 00 00
89 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00
91 00 00 00 00 0f 11 02 00
92 00 00 00 00 00 00 00 00
93 00 00 00 00 00 00 00 00
94 00 00 00 00 00 00 00 00
95 00 00 00 00 00 00 00 00
96 00 00 00 00 00 00 00 00
97 00 00 00 00 00 00 00 00
98 00 00 00 00 00 80 ce 01
99 00 00 00 00 00 00 6a 04
100 4d 34 37 31 42 35 36 37
101 34 42 48 30 2d 59 4b 30
102 20 20 00 00 80 ce 00 00
103 00 00 00 00 00 00 00 00
104 00 00 00 00 00 00 00 00
105 00 00 00 00 00 00 00 00
106 00 00 00 00 00 00 00 00
107 00 00 00 00 00 00 00 00
108 00 00 00 00 00 00 00 00
109 00 00 00 00 00 00 00 00
110 00 00 00 00 00 00 00 00
111 00 00 00 00 00 00 00 00
112 00 00 00 00 00 00 00 00
113 00 00 00 00 00 00 00 00
114 00 00 00 00 00 00 00 00
115 00 00 00 00 00 00 00 00];
117 micron_4Gb_1600_1.35v_x16 {
119 data = [92 11 0b 03 04 19 02 02
120 03 11 01 08 0a 00 fe 00
121 69 78 69 3c 69 11 18 81
122 20 08 3c 3c 01 40 83 05
123 00 00 00 00 00 00 00 00
124 00 00 00 00 00 00 00 00
125 00 00 00 00 00 00 00 00
126 00 00 00 00 0f 01 02 00
127 00 00 00 00 00 00 00 00
128 00 00 00 00 00 00 00 00
129 00 00 00 00 00 00 00 00
130 00 00 00 00 00 00 00 00
131 00 00 00 00 00 00 00 00
132 00 00 00 00 00 00 00 00
133 00 00 00 00 00 80 2c 00
134 00 00 00 00 00 00 ad 75
135 34 4b 54 46 32 35 36 36
136 34 48 5a 2d 31 47 36 45
137 31 20 45 31 80 2c 00 00
138 00 00 00 00 00 00 00 00
139 00 00 00 00 00 00 00 00
140 00 00 00 00 00 00 00 00
141 ff ff ff ff ff ff ff ff
142 ff ff ff ff ff ff ff ff
143 ff ff ff ff ff ff ff ff
144 ff ff ff ff ff ff ff ff
145 ff ff ff ff ff ff ff ff
146 ff ff ff ff ff ff ff ff
147 ff ff ff ff ff ff ff ff
148 ff ff ff ff ff ff ff ff
149 ff ff ff ff ff ff ff ff
150 ff ff ff ff ff ff ff ff];
155 #address-cells = <1>;
157 compatible = "intel,ich-spi";
160 #address-cells = <1>;
162 compatible = "winbond,w25q64", "spi-flash";
163 memory-map = <0xff800000 0x00800000>;
165 label = "rw-mrc-cache";
166 /* Alignment: 4k (for updating) */
167 reg = <0x003e0000 0x00010000>;
175 compatible = "intel,pci-ivybridge", "pci-x86";
176 #address-cells = <3>;
179 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
180 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
181 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
183 compatible = "intel,pantherpoint-ahci";
184 intel,sata-mode = "ahci";
185 intel,sata-port-map = <1>;
186 intel,sata-port0-gen3-tx = <0x00880a7f>;
190 compatible = "intel,gma";
191 intel,dp_hotplug = <0 0 0x06>;
192 intel,panel-port-select = <1>;
193 intel,panel-power-cycle-delay = <6>;
194 intel,panel-power-up-delay = <2000>;
195 intel,panel-power-down-delay = <500>;
196 intel,panel-power-backlight-on-delay = <2000>;
197 intel,panel-power-backlight-off-delay = <2000>;
198 intel,cpu-backlight = <0x00000200>;
199 intel,pch-backlight = <0x04000000>;
203 compatible = "intel,lpc";
204 #address-cells = <1>;
206 gen-dec = <0x800 0xfc 0x900 0xfc>;
207 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
208 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
209 0x80 0x80 0x80 0x80>;
210 intel,gpi-routing = <0 0 0 0 0 0 0 2
212 /* Enable EC SMI source */
213 intel,alt-gp-smi-enable = <0x0100>;
216 compatible = "google,cros-ec";
217 reg = <0x204 1 0x200 1 0x880 0x80>;
219 /* Describes the flash memory within the EC */
220 #address-cells = <1>;
223 reg = <0x08000000 0x20000>;
224 erase-value = <0xff>;
232 #include "microcode/m12306a9_0000001b.dtsi"