2 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
7 * SPDX-License-Identifier: GPL-2.0
16 #include <spi_flash.h>
17 #include <asm/mrccache.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 static struct mrc_data_container *next_mrc_block(
22 struct mrc_data_container *cache)
24 /* MRC data blocks are aligned within the region */
25 u32 mrc_size = sizeof(*cache) + cache->data_size;
26 u8 *region_ptr = (u8 *)cache;
28 if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
29 mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
30 mrc_size += MRC_DATA_ALIGN;
33 region_ptr += mrc_size;
35 return (struct mrc_data_container *)region_ptr;
38 static int is_mrc_cache(struct mrc_data_container *cache)
40 return cache && (cache->signature == MRC_DATA_SIGNATURE);
43 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
45 struct mrc_data_container *cache, *next;
46 ulong base_addr, end_addr;
49 base_addr = entry->base + entry->offset;
50 end_addr = base_addr + entry->length;
53 /* Search for the last filled entry in the region */
54 for (id = 0, next = (struct mrc_data_container *)base_addr;
58 next = next_mrc_block(next);
59 if ((ulong)next >= end_addr)
64 debug("%s: No valid MRC cache found.\n", __func__);
69 if (cache->checksum != compute_ip_checksum(cache->data,
71 printf("%s: MRC cache checksum mismatch\n", __func__);
75 debug("%s: picked entry %u from cache block\n", __func__, id);
81 * find_next_mrc_cache() - get next cache entry
83 * @entry: MRC cache flash area
84 * @cache: Entry to start from
86 * @return next cache entry if found, NULL if we got to the end
88 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
89 struct mrc_data_container *cache)
91 ulong base_addr, end_addr;
93 base_addr = entry->base + entry->offset;
94 end_addr = base_addr + entry->length;
96 cache = next_mrc_block(cache);
97 if ((ulong)cache >= end_addr) {
98 /* Crossed the boundary */
100 debug("%s: no available entries found\n", __func__);
102 debug("%s: picked next entry from cache block at %p\n",
109 int mrccache_update(struct udevice *sf, struct mrc_region *entry,
110 struct mrc_data_container *cur)
112 struct mrc_data_container *cache;
117 if (!is_mrc_cache(cur))
120 /* Find the last used block */
121 base_addr = entry->base + entry->offset;
122 debug("Updating MRC cache data\n");
123 cache = mrccache_find_current(entry);
124 if (cache && (cache->data_size == cur->data_size) &&
125 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
126 debug("MRC data in flash is up to date. No update\n");
130 /* Move to the next block, which will be the first unused block */
132 cache = find_next_mrc_cache(entry, cache);
135 * If we have got to the end, erase the entire mrc-cache area and start
139 debug("Erasing the MRC cache region of %x bytes at %x\n",
140 entry->length, entry->offset);
142 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
144 debug("Failed to erase flash region\n");
147 cache = (struct mrc_data_container *)base_addr;
150 /* Write the data out */
151 offset = (ulong)cache - base_addr + entry->offset;
152 debug("Write MRC cache update to flash at %lx\n", offset);
153 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
156 debug("Failed to write to SPI flash\n");
163 int mrccache_reserve(void)
165 struct mrc_data_container *cache;
168 if (!gd->arch.mrc_output_len)
171 /* adjust stack pointer to store pure cache data plus the header */
172 gd->start_addr_sp -= (gd->arch.mrc_output_len + MRC_DATA_HEADER_SIZE);
173 cache = (struct mrc_data_container *)gd->start_addr_sp;
175 cache->signature = MRC_DATA_SIGNATURE;
176 cache->data_size = gd->arch.mrc_output_len;
177 checksum = compute_ip_checksum(gd->arch.mrc_output, cache->data_size);
178 debug("Saving %d bytes for MRC output data, checksum %04x\n",
179 cache->data_size, checksum);
180 cache->checksum = checksum;
182 memcpy(cache->data, gd->arch.mrc_output, cache->data_size);
184 /* gd->arch.mrc_output now points to the container */
185 gd->arch.mrc_output = (char *)cache;
187 gd->start_addr_sp &= ~0xf;
192 int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
194 const void *blob = gd->fdt_blob;
199 /* Find the flash chip within the SPI controller node */
200 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
204 if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2))
205 return -FDT_ERR_NOTFOUND;
206 entry->base = reg[0];
208 /* Find the place where we put the MRC cache */
209 mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
213 if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2))
214 return -FDT_ERR_NOTFOUND;
215 entry->offset = reg[0];
216 entry->length = reg[1];
219 ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
221 debug("ret = %d\n", ret);
229 int mrccache_save(void)
231 struct mrc_data_container *data;
232 struct mrc_region entry;
236 if (!gd->arch.mrc_output_len)
238 debug("Saving %d bytes of MRC output data to SPI flash\n",
239 gd->arch.mrc_output_len);
241 ret = mrccache_get_region(&sf, &entry);
244 data = (struct mrc_data_container *)gd->arch.mrc_output;
245 ret = mrccache_update(sf, &entry, data);
247 debug("Saved MRC data with checksum %04x\n", data->checksum);
248 } else if (ret == -EEXIST) {
249 debug("MRC data is the same as last time, skipping save\n");
255 debug("%s: Failed: %d\n", __func__, ret);