2 * From Coreboot src/southbridge/intel/bd82x6x/mrccache.c
4 * Copyright (C) 2014 Google Inc.
6 * SPDX-License-Identifier: GPL-2.0
14 #include <spi_flash.h>
15 #include <asm/mrccache.h>
17 static struct mrc_data_container *next_mrc_block(
18 struct mrc_data_container *mrc_cache)
20 /* MRC data blocks are aligned within the region */
21 u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->data_size;
22 if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
23 mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
24 mrc_size += MRC_DATA_ALIGN;
27 u8 *region_ptr = (u8 *)mrc_cache;
28 region_ptr += mrc_size;
29 return (struct mrc_data_container *)region_ptr;
32 static int is_mrc_cache(struct mrc_data_container *cache)
34 return cache && (cache->signature == MRC_DATA_SIGNATURE);
38 * Find the largest index block in the MRC cache. Return NULL if none is
41 struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry)
43 struct mrc_data_container *cache, *next;
44 ulong base_addr, end_addr;
47 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
48 end_addr = base_addr + entry->length;
51 /* Search for the last filled entry in the region */
52 for (id = 0, next = (struct mrc_data_container *)base_addr;
56 next = next_mrc_block(next);
57 if ((ulong)next >= end_addr)
62 debug("%s: No valid MRC cache found.\n", __func__);
67 if (cache->checksum != compute_ip_checksum(cache->data,
69 printf("%s: MRC cache checksum mismatch\n", __func__);
73 debug("%s: picked entry %u from cache block\n", __func__, id);
79 * find_next_mrc_cache() - get next cache entry
81 * @entry: MRC cache flash area
82 * @cache: Entry to start from
84 * @return next cache entry if found, NULL if we got to the end
86 static struct mrc_data_container *find_next_mrc_cache(struct fmap_entry *entry,
87 struct mrc_data_container *cache)
89 ulong base_addr, end_addr;
91 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
92 end_addr = base_addr + entry->length;
94 cache = next_mrc_block(cache);
95 if ((ulong)cache >= end_addr) {
96 /* Crossed the boundary */
98 debug("%s: no available entries found\n", __func__);
100 debug("%s: picked next entry from cache block at %p\n",
107 int mrccache_update(struct udevice *sf, struct fmap_entry *entry,
108 struct mrc_data_container *cur)
110 struct mrc_data_container *cache;
115 /* Find the last used block */
116 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
117 debug("Updating MRC cache data\n");
118 cache = mrccache_find_current(entry);
119 if (cache && (cache->data_size == cur->data_size) &&
120 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
121 debug("MRC data in flash is up to date. No update\n");
125 /* Move to the next block, which will be the first unused block */
127 cache = find_next_mrc_cache(entry, cache);
130 * If we have got to the end, erase the entire mrc-cache area and start
134 debug("Erasing the MRC cache region of %x bytes at %x\n",
135 entry->length, entry->offset);
137 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
139 debug("Failed to erase flash region\n");
142 cache = (struct mrc_data_container *)base_addr;
145 /* Write the data out */
146 offset = (ulong)cache - base_addr + entry->offset;
147 debug("Write MRC cache update to flash at %lx\n", offset);
148 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
151 debug("Failed to write to SPI flash\n");