2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
7 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/at91sam9260.h>
30 #include <asm/arch/at91sam9_matrix.h>
31 #include <asm/arch/at91sam9_smc.h>
32 #include <asm/arch/at91_common.h>
33 #include <asm/arch/at91_pmc.h>
34 #include <asm/arch/at91_rstc.h>
35 #include <asm/arch/gpio.h>
36 #include <asm/arch/io.h>
37 #include <asm/arch/hardware.h>
39 DECLARE_GLOBAL_DATA_PTR;
41 /* ------------------------------------------------------------------------- */
43 * Miscelaneous platform dependent initialisations
46 static void tny_a9260_nand_hw_init(void)
51 csa = at91_sys_read(AT91_MATRIX_EBICSA);
52 at91_sys_write(AT91_MATRIX_EBICSA,
53 csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
55 /* Configure SMC CS3 for NAND/SmartMedia */
56 at91_sys_write(AT91_SMC_SETUP(3),
57 AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
58 AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
59 at91_sys_write(AT91_SMC_PULSE(3),
60 AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
61 AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
62 at91_sys_write(AT91_SMC_CYCLE(3),
63 AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
64 at91_sys_write(AT91_SMC_MODE(3),
65 AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
66 AT91_SMC_EXNWMODE_DISABLE |
67 #ifdef CONFIG_SYS_NAND_DBW_16
69 #else /* CONFIG_SYS_NAND_DBW_8 */
74 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
76 /* Configure RDY/BSY */
77 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
79 /* Enable NandFlash */
80 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
88 #if defined(CONFIG_TNY_A9260)
89 gd->bd->bi_arch_number = MACH_TYPE_TNY_A9260;
90 #elif defined(CONFIG_TNY_A9G20)
91 gd->bd->bi_arch_number = MACH_TYPE_TNY_A9G20;
93 /* adress of boot parameters */
94 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
96 at91_serial_hw_init();
97 tny_a9260_nand_hw_init();
98 at91_spi0_hw_init(1 << 5);
104 gd->bd->bi_dram[0].start = PHYS_SDRAM;
105 if(get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) != PHYS_SDRAM_SIZE)
108 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;