2 * (C) Copyright 2007-2013
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
6 * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/at91sam9_smc.h>
13 #include <asm/arch/at91_common.h>
14 #include <asm/arch/at91_matrix.h>
15 #include <asm/arch/clk.h>
16 #include <asm/arch/gpio.h>
17 #include <asm-generic/gpio.h>
21 #include <dataflash.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 #ifdef CONFIG_HAS_DATAFLASH
26 AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
28 struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
29 {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
32 /*define the area offsets*/
33 dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
34 {0x00000000, 0x00001FFF, FLAG_PROTECT_SET, 0, "Bootstrap"},
35 {0x00002000, 0x00003FFF, FLAG_PROTECT_CLEAR, 0, "Environment"},
36 {0x00004000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"},
40 #ifdef CONFIG_CMD_NAND
41 static void usb_a9263_nand_hw_init(void)
44 at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0;
45 at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX;
48 csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
49 writel(csa, &matrix->csa[0]);
51 /* Configure SMC CS3 for NAND/SmartMedia */
52 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
53 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
56 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
57 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
60 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
63 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
64 AT91_SMC_MODE_EXNW_DISABLE |
66 AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
68 at91_periph_clk_enable(ATMEL_ID_PIOA);
69 at91_periph_clk_enable(ATMEL_ID_PIOCDE);
71 /* Configure RDY/BSY */
72 gpio_request(CONFIG_SYS_NAND_READY_PIN, "NAND ready/busy");
73 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
75 /* Enable NandFlash */
76 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "NAND enable");
77 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
82 static void usb_a9263_macb_hw_init(void)
84 at91_periph_clk_enable(ATMEL_ID_EMAC);
88 * RXDV (PC25) => PHY normal mode (not Test mode)
89 * ERX0 (PE25) => PHY ADDR0
90 * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
92 * PHY has internal weak pull-up/pull-down
94 gpio_request(GPIO_PIN_PC(25), "PHY mode");
95 gpio_direction_input(GPIO_PIN_PC(25));
97 gpio_request(GPIO_PIN_PE(25), "PHY ADDR0");
98 gpio_direction_input(GPIO_PIN_PE(25));
100 gpio_request(GPIO_PIN_PE(26), "PHY ADDR1");
101 gpio_direction_input(GPIO_PIN_PE(26));
105 /* It will set proper pinmux for ports PC25, PE25-26 */
112 /* adress of boot parameters */
113 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
115 #ifdef CONFIG_CMD_NAND
116 usb_a9263_nand_hw_init();
118 #ifdef CONFIG_HAS_DATAFLASH
119 at91_spi0_hw_init(1 << 0);
122 usb_a9263_macb_hw_init();
124 #ifdef CONFIG_USB_OHCI_NEW
132 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
133 CONFIG_SYS_SDRAM_SIZE);
137 int board_eth_init(bd_t *bis)
142 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x0001);