2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
4 * Base on code from TI. Original Notices follow:
6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
8 * Modified for DA8xx EVM.
10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 * Parts are shamelessly stolen from various TI sources, original copyright
14 * -----------------------------------------------------------------
16 * Copyright (C) 2004 Texas Instruments.
18 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
39 #include <asm/arch/hardware.h>
40 #include <asm/arch/emif_defs.h>
41 #include <asm/arch/emac_defs.h>
42 #include <asm/arch/pinmux_defs.h>
45 #include <asm/arch/nand_defs.h>
46 #include <asm/arch/davinci_misc.h>
48 #ifdef CONFIG_DAVINCI_MMC
50 #include <asm/arch/sdmmc_defs.h>
53 DECLARE_GLOBAL_DATA_PTR;
55 static const struct pinmux_resource pinmuxes[] = {
56 #ifdef CONFIG_SPI_FLASH
57 PINMUX_ITEM(spi0_pins_base),
58 PINMUX_ITEM(spi0_pins_scs0),
59 PINMUX_ITEM(spi0_pins_ena),
61 PINMUX_ITEM(uart2_pins_txrx),
62 PINMUX_ITEM(i2c0_pins),
63 #ifdef CONFIG_USB_DA8XX
64 PINMUX_ITEM(usb_pins),
66 #ifdef CONFIG_USE_NAND
67 PINMUX_ITEM(emifa_pins),
68 PINMUX_ITEM(emifa_pins_cs0),
69 PINMUX_ITEM(emifa_pins_cs2),
70 PINMUX_ITEM(emifa_pins_cs3),
72 #if defined(CONFIG_DRIVER_TI_EMAC)
73 PINMUX_ITEM(emac_pins_rmii),
74 PINMUX_ITEM(emac_pins_mdio),
75 PINMUX_ITEM(emac_pins_rmii_clk_source),
77 #ifdef CONFIG_DAVINCI_MMC
78 PINMUX_ITEM(mmc0_pins_8bit)
82 static const struct lpsc_resource lpsc[] = {
83 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
84 { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
85 { DAVINCI_LPSC_EMAC }, /* image download */
86 { DAVINCI_LPSC_UART2 }, /* console */
87 { DAVINCI_LPSC_GPIO },
88 #ifdef CONFIG_DAVINCI_MMC
89 { DAVINCI_LPSC_MMC_SD },
94 #ifdef CONFIG_DAVINCI_MMC
95 static struct davinci_mmc mmc_sd0 = {
96 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
97 .host_caps = MMC_MODE_8BIT,
98 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
99 .version = MMC_CTLR_VERSION_2,
102 int board_mmc_init(bd_t *bis)
104 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
106 printf("%x\n", mmc_sd0.input_clk);
108 /* Add slot-0 to mmc subsystem */
109 return davinci_mmc_init(bis, &mmc_sd0);
115 #ifndef CONFIG_USE_IRQ
119 #ifdef CONFIG_NAND_DAVINCI
120 /* EMIFA 100MHz clock select */
121 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
122 &davinci_syscfg_regs->cfgchip3);
124 writel((DAVINCI_ABCR_WSETUP(0) |
125 DAVINCI_ABCR_WSTROBE(2) |
126 DAVINCI_ABCR_WHOLD(0) |
127 DAVINCI_ABCR_RSETUP(0) |
128 DAVINCI_ABCR_RSTROBE(2) |
129 DAVINCI_ABCR_RHOLD(0) |
131 DAVINCI_ABCR_ASIZE_8BIT),
132 &davinci_emif_regs->ab2cr);
135 /* arch number of the board */
136 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
138 /* address of boot parameters */
139 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
142 * Power on required peripherals
143 * ARM does not have access by default to PSC0 and PSC1
144 * assuming here that the DSP bootloader has set the IOPU
145 * such that PSC access is available to ARM
147 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
150 /* setup the SUSPSRC for ARM to control emulation suspend */
151 writel(readl(&davinci_syscfg_regs->suspsrc) &
152 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
153 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
154 DAVINCI_SYSCFG_SUSPSRC_UART2),
155 &davinci_syscfg_regs->suspsrc);
157 /* configure pinmux settings */
158 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
161 /* enable the console UART */
162 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
163 DAVINCI_UART_PWREMU_MGMT_UTRST),
164 &davinci_uart2_ctrl_regs->pwremu_mgmt);
170 #ifdef CONFIG_NAND_DAVINCI
171 int board_nand_init(struct nand_chip *nand)
173 davinci_nand_init(nand);
179 #if defined(CONFIG_DRIVER_TI_EMAC)
181 #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
184 * Initializes on-board ethernet controllers.
186 int board_eth_init(bd_t *bis)
188 u_int8_t mac_addr[6];
189 u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
190 struct eth_device *dev;
192 /* Read Ethernet MAC address from EEPROM */
193 if (dvevm_read_mac_address(mac_addr))
194 /* set address env if not already set */
195 davinci_sync_env_enetaddr(mac_addr);
197 /* read the address back from env */
198 if (!eth_getenv_enetaddr("ethaddr", mac_addr))
201 /* enable the Ethernet switch in the 3 port PHY */
202 if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
203 switch_start_cmd, sizeof(switch_start_cmd))) {
204 printf("Ethernet switch start failed!\n");
208 /* finally, initialise the driver */
209 if (!davinci_emac_initialize()) {
210 printf("Error: Ethernet init failed!\n");
216 /* provide the resulting addr to the driver */
217 memcpy(dev->enetaddr, mac_addr, 6);
218 dev->write_hwaddr(dev);
222 #endif /* CONFIG_DRIVER_TI_EMAC */