2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
7 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #include <asm/arch/hardware.h>
36 #include <asm/arch/at91sam9260_matrix.h>
37 #include <asm/arch/at91sam9_smc.h>
38 #include <asm/arch/at91_common.h>
39 #include <asm/arch/at91_pmc.h>
40 #include <asm/arch/at91_rstc.h>
41 #include <asm/arch/at91_shdwn.h>
42 #include <asm/arch/gpio.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 #ifdef CONFIG_CMD_NAND
47 static void nand_hw_init(void)
49 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
50 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
53 /* Assign CS3 to NAND/SmartMedia Interface */
54 csa = readl(&matrix->ebicsa);
55 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
56 writel(csa, &matrix->ebicsa);
58 /* Configure SMC CS3 for NAND/SmartMedia */
59 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
60 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
62 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
63 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
65 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
67 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
68 AT91_SMC_MODE_EXNW_DISABLE |
70 AT91_SMC_MODE_TDF_CYCLE(2),
73 /* Configure RDY/BSY */
74 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
76 /* Enable NandFlash */
77 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
82 static void macb_hw_init(void)
84 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
86 /* Enable EMAC clock */
87 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
89 /* Initialize EMAC=MACB hardware */
94 #ifdef CONFIG_GENERIC_ATMEL_MCI
95 /* this is a weak define that we are overriding */
96 int board_mmc_init(bd_t *bd)
98 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
100 /* Enable MCI clock */
101 writel(1 << ATMEL_ID_MCI, &pmc->pcer);
103 /* Initialize MCI hardware */
106 /* This calls the atmel_mmc_init in gen_atmel_mci.c */
107 return atmel_mci_init((void *)ATMEL_BASE_MCI);
110 /* this is a weak define that we are overriding */
111 int board_mmc_getcd(u8 *cd, struct mmc *mmc)
114 * the only currently existing use of this function
115 * (fsl_esdhc.c) suggests this function must return
116 * *cs = TRUE if a card is NOT detected -> in most
117 * cases the value of the pin when the detect switch
120 *cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
126 int board_early_init_f(void)
128 struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
129 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
132 * make sure the board can be powered on by
133 * any transition on WKUP
135 writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
138 /* Enable clocks for all PIOs */
139 writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
140 (1 << ATMEL_ID_PIOC),
143 /* set SCL0 and SDA0 to open drain */
144 at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
145 at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
146 at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
147 at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
148 at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
149 at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
151 /* set SCL1 and SDA1 to open drain */
152 at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
153 at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
154 at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
155 at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
156 at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
157 at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
163 /* arch number of TOP9000 Board */
164 gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
165 /* adress of boot parameters */
166 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
168 at91_seriald_hw_init();
169 #ifdef CONFIG_CMD_NAND
175 #ifdef CONFIG_ATMEL_SPI0
176 /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
177 at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
179 #ifdef CONFIG_ATMEL_SPI1
180 at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
185 #ifdef CONFIG_MISC_INIT_R
186 int misc_init_r(void)
188 /* read 'factory' part of EEPROM */
196 gd->ram_size = get_ram_size(
197 (void *)CONFIG_SYS_SDRAM_BASE,
198 CONFIG_SYS_SDRAM_SIZE);
202 #ifdef CONFIG_RESET_PHY_R
206 * Initialize ethernet HW addresses prior to starting Linux,
207 * needed for nfsroot.
208 * TODO: We need to investigate if that is really necessary.
214 int board_eth_init(bd_t *bis)
219 rc = macb_eth_initialize(0,
220 (void *)ATMEL_BASE_EMAC0,
225 #ifdef CONFIG_ENC28J60
226 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
227 ENC_SPI_CLOCK, SPI_MODE_0);
230 # ifdef CONFIG_ENC28J60_2
231 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
232 ENC_SPI_CLOCK, SPI_MODE_0);
235 # ifdef CONFIG_ENC28J60_3
236 rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
237 ENC_SPI_CLOCK, SPI_MODE_0);
247 * I2C access functions
250 * We need to access Bus 0 before relocation to access the
251 * environment settings.
252 * However i2c_get_bus_num() cannot be called before
255 #ifdef CONFIG_SOFT_I2C
258 /* ports are now initialized in board_early_init_f() */
263 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
265 return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
267 return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
272 void iic_sda(int bit)
274 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
276 at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
279 at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
284 void iic_scl(int bit)
286 switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
288 at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
291 at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);