2 * (C) Copyright 2001-2003
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
6 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/processor.h>
33 extern void lxt971_no_sleep(void);
36 /* fpga configuration data - not compressed, generated by bin2c */
37 const unsigned char fpgadata[] =
41 int filesize = sizeof(fpgadata);
44 int board_early_init_f (void)
47 * IRQ 0-15 405GP internally generated; active high; level sensitive
48 * IRQ 16 405GP internally generated; active low; level sensitive
50 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
51 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
52 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
53 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
54 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
55 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
56 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
58 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
59 mtdcr(uicer, 0x00000000); /* disable all ints */
60 mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
61 mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
62 mtdcr(uictr, 0x10000000); /* set int trigger levels */
63 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
64 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
67 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
69 mtebc (epcr, 0xa8400000);
75 mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_FPGA_INIT | \
81 if (!(in32(GPIO0_IR) & CFG_REV1_2)) {
83 mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_INTA_FAKE | \
88 out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA | CFG_XEREADY); /* setup for output */
90 /* - check if rev1_2 is low, then:
91 * - set/reset CFG_INTA_FAKE/CFG_SELF_RST in TCR to assert INTA# or SELFRST#
98 /* ------------------------------------------------------------------------- */
101 int misc_init_r (void)
103 DECLARE_GLOBAL_DATA_PTR;
105 /* adjust flash start and offset */
106 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
107 gd->bd->bi_flashoffset = 0;
109 out32(GPIO0_OR, in32(GPIO0_OR) | CFG_XEREADY); /* deassert EREADY# */
113 ushort pmc405_pci_subsys_deviceid(void)
116 val = in32(GPIO0_IR);
117 if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
118 if (val & CFG_NONMONARCH) { /* monarch# signal */
119 return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
121 return CFG_PCI_SUBSYS_DEVICEID_MONARCH;
123 return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
127 * Check Board Identity:
129 int checkboard (void)
134 int i = getenv_r ("serial#", str, sizeof(str));
139 puts ("### No HW ID - assuming PMC405");
144 val = in32(GPIO0_IR);
145 if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
147 if (val & CFG_NONMONARCH) { /* monarch# signal */
160 /* ------------------------------------------------------------------------- */
162 long int initdram (int board_type)
166 mtdcr(memcfga, mem_mb0cf);
167 val = mfdcr(memcfgd);
170 printf("\nmb0cf=%x\n", val); /* test-only */
171 printf("strap=%x\n", mfdcr(strap)); /* test-only */
174 return (4*1024*1024 << ((val & 0x000e0000) >> 17));
178 /* ------------------------------------------------------------------------- */
181 #ifdef CONFIG_LXT971_NO_SLEEP
184 * Disable sleep mode in LXT971
191 int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
198 addr = simple_strtol (argv[1], NULL, 16) + 0x16;
203 for (i=0; i<8; i++) {
208 printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val);
212 /* Abort if ctrl-c was pressed */
225 cantest, 3, 1, do_cantest,
226 "cantest - Test CAN controller",