2 #include <asm/u-boot.h>
3 #include <asm/processor.h>
9 /* ************************************************************************ */
10 int board_early_init_f (void)
11 /* ------------------------------------------------------------------------ --
17 * ************************************************************************ */
21 /*-------------------------------------------------------------------------+
22 | Interrupt controller setup for the Walnut board.
23 | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
24 | IRQ 16 405GP internally generated; active low; level sensitive
26 | IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
27 | IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
28 | IRQ 27 (EXT IRQ 2) Not Used
29 | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
30 | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
31 | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
32 | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
33 | Note for Walnut board:
34 | An interrupt taken for the FPGA (IRQ 25) indicates that either
35 | the Mouse, Keyboard, IRDA, or External Expansion caused the
36 | interrupt. The FPGA must be read to determine which device
37 | caused the interrupt. The default setting of the FPGA clears
39 +-------------------------------------------------------------------------*/
41 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
42 mtdcr (uicer, 0x00000000); /* disable all ints */
43 mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
44 mtdcr (uicpr, 0xFFFFFF90); /* set int polarities */
45 mtdcr (uictr, 0x10000000); /* set int trigger levels */
46 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
47 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
49 /* Perform reset of PHY connected to PPC via register in CPLD */
50 out8 (PHY_CTRL_ADDR, 0x2e); /* activate nRESET,FDX,F100,ANEN, enable output */
51 for (i = 0; i < 10000000; i++) {
54 out8 (PHY_CTRL_ADDR, 0x2f); /* deactivate nRESET */
60 /* ************************************************************************ */
62 /* ------------------------------------------------------------------------ --
68 * ************************************************************************ */
70 printf ("Exbit H/W id: %d\n", in8 (HW_ID_ADDR));
74 /* ************************************************************************ */
75 phys_size_t initdram (int board_type)
76 /* ------------------------------------------------------------------------ --
77 * Purpose : Determines size of mounted DRAM.
78 * Remarks : Size is determined by reading SDRAM configuration registers as
79 * set up by sdram_init.
83 * ************************************************************************ */
90 * ToDo: Move the asm init routine sdram_init() to this C file,
91 * or even better use some common ppc4xx code available
98 mtdcr (memcfga, mem_mb0cf);
99 tmp = mfdcr (memcfgd);
100 if (tmp & 0x00000001) {
101 bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
102 tot_size += bank_size;
105 mtdcr (memcfga, mem_mb1cf);
106 tmp = mfdcr (memcfgd);
107 if (tmp & 0x00000001) {
108 bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
109 tot_size += bank_size;
112 mtdcr (memcfga, mem_mb2cf);
113 tmp = mfdcr (memcfgd);
114 if (tmp & 0x00000001) {
115 bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
116 tot_size += bank_size;
119 mtdcr (memcfga, mem_mb3cf);
120 tmp = mfdcr (memcfgd);
121 if (tmp & 0x00000001) {
122 bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
123 tot_size += bank_size;