2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <power/pmic.h>
10 #include <power/pfuze100_pmic.h>
12 int pfuze_mode_init(struct pmic *p, u32 mode)
14 unsigned char offset, i, switch_num;
17 pmic_reg_read(p, PFUZE100_DEVICEID, &id);
22 offset = PFUZE100_SW1CMODE;
25 offset = PFUZE100_SW2MODE;
27 printf("Not supported, id=%d\n", id);
31 ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
33 printf("Set SW1AB mode error!\n");
37 for (i = 0; i < switch_num - 1; i++) {
38 ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
40 printf("Set switch 0x%x mode error!\n",
41 offset + i * SWITCH_SIZE);
49 struct pmic *pfuze_common_init(unsigned char i2cbus)
55 ret = power_pfuze100_init(i2cbus);
59 p = pmic_get("PFUZE100");
64 pmic_reg_read(p, PFUZE100_DEVICEID, ®);
65 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
67 /* Set SW1AB stanby volage to 0.975V */
68 pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
69 reg &= ~SW1x_STBY_MASK;
71 pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
73 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
74 pmic_reg_read(p, PUZE_100_SW1ABCONF, ®);
75 reg &= ~SW1xCONF_DVSSPEED_MASK;
76 reg |= SW1xCONF_DVSSPEED_4US;
77 pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
79 /* Set SW1C standby voltage to 0.975V */
80 pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
81 reg &= ~SW1x_STBY_MASK;
83 pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
85 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
86 pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
87 reg &= ~SW1xCONF_DVSSPEED_MASK;
88 reg |= SW1xCONF_DVSSPEED_4US;
89 pmic_reg_write(p, PFUZE100_SW1CCONF, reg);